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參數(shù)資料
| 型號(hào)： | LTC1695 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | SMBus/I 2 C Fan Speed Controller in SOT-23(SMBus/I 2 C 風(fēng)扇速度控制器（SOT-23封裝）) |
| 中文描述： | 的SMBus /的I 2 C風(fēng)扇調(diào)速器采用SOT - 23（的SMBus /的I 2 C風(fēng)扇速度控制器（采用SOT - 23封裝）） |
| 文件頁數(shù)： | 14/20頁 |
| 文件大小： | 204K |
| 代理商： | LTC1695 |
LTC1695
14
Thermal Considerations
The LTC1695’s power handling capability is limited by the
maximum rated junction temperature of 125
°
C. Power
dissipation (P
DISS
) consists of two components:
1. Output current multiplied by the input/output voltage
differential: (I
LOAD
)(V
CC
– V
OUT
), and
2. GND pin current multiplied by the input voltage:
(I
GND
)(V
CC
).
P
DISS
= (I
LOAD
)(V
CC
– V
OUT
) + (I
GND
)(V
CC
)
T
J
= P
DISS
(
θ
JA
)
The LTC1695 has active current limiting and thermal
shutdown circuitry for device protection during overload
or fault condition. For continuous overload conditions, do
not exceed the 125
°
C maximum junction temperature
T
J(MAX)
. Give careful consideration to all thermal resis-
tance sources from junction to ambient. Consider any
additional heat sources mounted in proximity to the
LTC1695. This is particularly relevant in applications
where the LTC1695’s output is loaded with a constant
I
LOAD
and V
OUT
is dynamically varied via the SMBus. At
lower DAC output voltage codes, the increased input-to-
output differential increases power dissipation if I
LOAD
does not decrease.
For the LTC1695’s 5-lead SOT-23 surface mount package,
heat sinking is accomplished by using the heat spreading
capabilities of the PC board and its copper traces (in
particular, the GND pin trace).
The following table lists measured thermal resistance
results for various size boards and copper areas. All
measurements were taken in still air on 3/32" FR-4 board
with one ounce copper.
Table 2. Measured Thermal Resistance (
θ
JA
)
Copper Area
Topside*
2500mm
2
1000mm
2
225mm
2
100mm
2
50mm
2
*Device is mounted on topside
Backside
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2500mm
2
Board Area
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2500mm
2
125
°
C/W
125
°
C/W
130
°
C/W
135
°
C/W
150
°
C/W
+
+
–
+
OP AMP
+
+
C
GATE
C
NODE
V
CC
V
OUT
L
FAN
C
FAN
C
OUT
ESR
R1
R2
GND
EQUIVALENT
DC FAN CIRCUIT
INTERNAL
DAC
OUTPUT
P1(0.75
)
1695 F04
Figure 4. Regulator Feedback Loop
capacitance ranges from 2pF to 30pF. As previously
discussed, an output bypass capacitor is required to
stabilize the feedback loop. This output capacitor is in
parallel with the fan’s input capacitance and dominates the
total capacitance. Thus, stability is generally not affected
by the fan’s input capacitance. The output capacitor also
serves to filter the fan’s output ripple during commutation
of the fan’s motor.
POR and UVLO
Under start-up conditions, the LTC1695 performs a power
on reset (POR) function. The digital logic circuitry is
disabled and the regulator is held off. The SMBus com-
mand register (to the DAC’s input) and data register
(current limit and thermal shutdown status) are reset to
zero. The POR signal deactivates if V
CC
rises above 2.9V
typically. The LTC1695 is then allowed to communicate
with the SMBus host and drive the fan accordingly. Upon
exiting POR, the regulator’s output voltage is set to V
ZS
(code 0) until programmed by the SMBus host.
The LTC1695 enters UVLO if V
CC
falls below 2.8V typically.
Between 2.8V and 1V, the digital logic circuitry is disabled,
the command/data registers are cleared and the regulator
is shut down. In general, 100mV of hysteresis exists
between the UVLO and POR thresholds.
APPLICATIO
S I
FOR
ATIO
U
W
U
U
Thermal Resistance
(Junction to Ambient)
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