VOUT A
參數(shù)資料
型號(hào): LTC1660IN
廠商: Linear Technology
文件頁數(shù): 17/18頁
文件大?。?/td> 0K
描述: IC D/A CONV 10BIT OCTAL 16-DIP
標(biāo)準(zhǔn)包裝: 25
設(shè)置時(shí)間: 30µs
位數(shù): 10
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 單電源
功率耗散(最大): 1mW
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 16-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-PDIP
包裝: 管件
輸出數(shù)目和類型: 8 電壓,單極;8 電壓,雙極
采樣率(每秒): *
產(chǎn)品目錄頁面: 1350 (CN2011-ZH PDF)
LTC1665/LTC1660
8
166560fa
BLOCK DIAGRAM
PIN FUNCTIONS
GND (Pin 1): System Ground.
VOUT A to VOUT H (Pins 2-5 and 12-15): DAC Analog Volt-
age Outputs. The output range is
0to
255
256
VREF for the LTC1665
0to
1023
1024
VREF for the LTC1660
REF (Pin 6): Reference Voltage Input. 0V ≤ VREF ≤ VCC.
CS/LD (Pin 7): Serial Interface Chip Select/Load Input.
When CS/LD is low, SCK is enabled for shifting data on
DIN into the register. When CS/LD is pulled high, SCK is
disabled and data is loaded from the shift register into the
specified DAC register(s), updating the analog output(s).
CMOS and TTL compatible.
SCK (Pin 8): Serial Interface Clock Input. CMOS and TTL
compatible.
DIN (Pin 9): Serial Interface Data Input. Data on the DIN
pin is shifted into the 16-bit register on the rising edge of
SCK. CMOS and TTL compatible.
DOUT (Pin 10): Serial Interface Data Output. Data appears
on DOUT 16 positive SCK edges after being applied to DIN.
May be tied to DIN of another LTC1665/LTC1660 for daisy-
chain operation. CMOS and TTL compatible.
CLR (Pin 11): Asynchronous Clear Input. All internal shift
and DAC registers are cleared to zero at the falling edge of
the CLR signal, forcing the analog outputs to zero scale.
CMOS and TTL compatible.
VCC (Pin 16): Supply Voltage Input. 2.7V ≤ VCC ≤ 5.5V.
(LTC1665/LTC1660)
2
15
1
GND
VOUT A
VOUT B
VOUT C
VOUT D
REF
CS/LD
SCK
VCC
VOUT H
VOUT G
VOUT F
VOUT E
CLR
DOUT
DIN
166560 BD
16
DAC A
DAC H
3
14
DAC B
DAC G
4
13
DAC C
DAC F
5
7
6
8
10
11
9
12
DAC D
DAC E
ADDRESS
DECODER
CONTROL
LOGIC
SHIFT REGISTER
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