參數(shù)資料
型號(hào): LTC1659
廠商: Linear Technology Corporation
英文描述: 12-Bit Rail-to-Rail Micropower DAC in MSOP Package(12位,微功耗滿幅度電壓輸出數(shù)模轉(zhuǎn)換器(8腳MSOP封裝))
中文描述: 12位軌至軌微DAC,采用MSOP封裝(12位,微功耗滿幅度電壓輸出數(shù)模轉(zhuǎn)換器(八腳型MSOP封裝))
文件頁數(shù): 7/12頁
文件大小: 102K
代理商: LTC1659
7
LTC1659
TW U
W
B11
MSB
B10
t
1
t
9
B1
t
6
B0
LSB
B11
CURRENT WORD
t
7
t
2
t
4
t
3
t
8
CLK
D
IN
D
OUT
CS/LD
t
5
1659 TD
B0
PREVIOUS WORD
B11
PREVIOUS WORD
B10
B1
B0
DEFI ITIO S
U
U
Differential Nonlinearity (DNL):
The difference between
the measured change and the ideal 1LSB change for any
two adjacent codes. The DNL error between any two codes
is calculated as follows:
DNL = (
V
OUT
– LSB)/LSB
Where
V
OUT
is the measured voltage difference between
two adjacent codes.
Digital Feedthrough:
The glitch that appears at the analog
output caused by AC coupling from the digital inputs when
they change state. The area of the glitch is specified in
(nV)(sec).
Full-Scale Error (FSE):
The deviation of the actual full-
scale voltage from ideal. FSE includes the effects of offset
and gain errors (see Applications Information).
Integral Nonlinearity (INL):
The deviation from a straight
line passing through the endpoints of the DAC transfer
curve (Endpoint INL). Because the output cannot go below
zero, the linearity is measured between full scale and the
lowest code which guarantees the output will be greater
than zero. The INL error at a given input code is
calculated
as follows:
INL = [V
OUT
– V
OS
– (V
FS
– V
OS
)(code/4095)]/LSB
Where V
OUT
is the output voltage of the DAC measured at
the given input code.
Least Significant Bit (LSB):
The ideal voltage difference
between two successive codes.
LSB = V
REF
/4096
Resolution (n):
Defines the number of DAC output states
(2
n
) that divide the full-scale range. Resolution does not
imply linearity.
Voltage Offset Error (V
OS
):
Nominally, the voltage at the
output when the DAC is loaded with all zeros. A single
supply DAC can have a true negative offset, but the output
cannot go below zero (see Applications Information).
For this reason, single supply DAC offset is measured at
the lowest code that guarantees the output will be greater
than zero.
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LTC1693-1 High Speed Dual N-Channel MOSFET Drivers(高速,雙路P溝道MOS場(chǎng)效應(yīng)管驅(qū)動(dòng)器(2個(gè)同相驅(qū)動(dòng)器))
LTC1693-2 High Speed Dual N-Channel MOSFET Drivers(高速,雙路P溝道MOS場(chǎng)效應(yīng)管驅(qū)動(dòng)器(1個(gè)同相和1個(gè)反相驅(qū)動(dòng)器))
LTC1693-3 High Speed Single N-Channel MOSFET Drivers(高速,單路P溝道MOS場(chǎng)效應(yīng)管驅(qū)動(dòng)器)
LTC1694 SMBus/I 2 C Accelerator(SMBus/I 2 C加速器)
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