the comparator" />
參數(shù)資料
型號(hào): LTC1445IS#PBF
廠商: Linear Technology
文件頁數(shù): 14/14頁
文件大小: 0K
描述: IC COMP W/REF LOWPWR QUAD 16SOIC
標(biāo)準(zhǔn)包裝: 50
類型: 帶電壓基準(zhǔn)
元件數(shù): 4
輸出類型: CMOS,TTL
電壓 - 電源,單路/雙路(±): 2 V ~ 11 V,±1 V ~ 5.5 V
電壓 - 輸入偏移(最小值): 10mV @ 5V
電流 - 輸出(標(biāo)準(zhǔn)): 0.015mA @ 5V
電流 - 靜態(tài)(最大值): 8.5µA
CMRR, PSRR(標(biāo)準(zhǔn)): 80dB CMRR,80dB PSRR
傳輸延遲(最大): 12µs
磁滯: 50mV
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
安裝類型: 表面貼裝
包裝: 管件
產(chǎn)品目錄頁面: 1324 (CN2011-ZH PDF)
LTC1443/LTC1444/LTC1445
9
144345fe
applicaTions inForMaTion
Bypassing the reference can help prevent false tripping of
the comparators by preventing glitches on the V+ or the
reference output voltage. Figure 3 shows the bypassed
reference output with a square wave applied to the V+ pin.
Resistors R1 and R2 set 10mV of hysteresis, while R3
damps the reference response. Note that the comparator
output doesn’t trip.
Hysteresis
Hysteresis can be added to the LTC1444/LTC1445 by con-
necting a resistor (R1) between the REF and HYST pins,
and a second resistor (R2) from HYST to V(Figure 4).
Thedifferencebetweentheupperandlowerthresholdvolt-
ages or hysteresis voltage band (VHB) is equal to twice the
voltage difference between the REF and HYST pins. When
more hysteresis is added, the upper threshold increases
the same amount as the lower threshold decreases. The
maximum voltage allowed between REF and HYST is
50mV, producing a maximum hysteresis voltage band of
100mV. If hysteresis is not wanted, the HYST pin should
be shorted to REF. Acceptable values for IREF range from
0.1A to 5A. If 2.4M is chosen for R2, then R1(kΩ) =
VHB (mV).
IN A+
5
OUT
V+
R1
10k
R3
430
R2
2.4M
C1
1.0F
IN A
HYST
REF
4
14
8
5V
TO 8V
144345 F03a
LTC1445
3
9
2
+
1.2V
+–
V
Figure 3a. V+ Glitching Test Circuit
Figure 3b. V+ Glitching Response
Figure 4. Programmable Hysteresis
8
R2
HYST
REF
14
R1
144345 F04
LTC1445
9
IREF
R1 =
VHB
(2)(IREF)
R2 =
IREF
VHB
2
(
)
1.221V –
V+
8V
5V
VREF
144345 F03b
OUT
2ms/DIV
2mV/DIV
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