參數(shù)資料
型號(hào): LTC1429CS
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: Clock-Synchronized Switched Capacitor Regulated Voltage Inverter
中文描述: SWITCHED CAPACITOR REGULATOR, 700 kHz SWITCHING FREQ-MAX, PDSO14
封裝: 0.150 INCH, PLASTIC, SO-14
文件頁(yè)數(shù): 9/12頁(yè)
文件大?。?/td> 275K
代理商: LTC1429CS
9
LTC1429
APPLICATIO
S I
FOR
ATIO
U
tions can be obtained with larger filter capacitors or by
using an LC output filter or higher F
SYNC
clock rate with a
lower value (<0.1
μ
F) of flying capacitor. Also see the
section on Output Capacitor ESR. For applications requir-
ing ripple below 1mV, see the LTC1550/LTC1551 data
sheet.
W
U
U
CAPACITOR SELECTION
Capacitor Sizing
The performance is dependent on the type of capacitors
used. The LTC1429 requires bypass caps to ground for
both the V
CC
and OUT pins. The input cap provides most
of the LTC1429’s supply current while it is charging the
flying caps. It should be mounted as close to the package
as possible, its value should be equal to or larger than the
flying cap in doubling mode and at least twice the value of
the flying caps in tripling mode. Ceramic capacitors
generally provide adequate performance; avoid using a
tantalum capacitor as the input bypass unless there is at
least a 0.1
μ
F ceramic cap in parallel with it. The charge
pump caps are somewhat less critical, since their peak
currents are limited by the switches inside the LTC1429.
Most applications should use 0.1
μ
F as the flying cap
value; conveniently, ceramic caps are the most common
type of 0.1
μ
F cap and they work well here. Usually the
easiest solution is to use the same type of capacitor for
both the input bypass and flying caps.
The output cap performs two functions; it provides output
current to the load during half of the charge pump cycle
and its value helps to set the output ripple voltage. For
applications that are insensitive to output ripple, the
output bypass cap can be as small as 1
μ
F. To achieve
specified low output ripple, a 3.3
μ
F or greater output
capacitor, high input clock rate (F
SYNC
) and lower value
(< 0.1
μ
F) of flying capacitor should be used. Larger output
caps will reduce output ripple further, at the expense of
turn on time.
In an application where the maximum load current is well-
defined and output ripple is critical or input peak currents
need to be minimized, the flying capacitor values can be
tailored to the application. Reducing the value of the flying
capacitors reduces the amount of charge transferred with
each clock cycle. The smaller capacitors draw smaller
pulses of current out of V
CC
as well, limiting peak currents
and reducing the demands on the input supply. Tables 1
and 2 show recommended values of flying capacitors vs
maximum load capacity at F
SYNC
= 400kHz and 700kHz
respectively.
Table 1. Typical Max Load (mA) vs Flying Capacitor Value at
T
A
= 25
°
C, V
OUT
= –4V, F
SYNC
= 400kHz
MAX LOAD (mA)
FLYING CAPACITOR
V
CC
= 5V
VALUE (
μ
F)
DOUBLER MODE
0.1
22
0.047
16
0.033
0.022
0.01
MAX LOAD (mA)
V
CC
= 3.3V
TRIPLER MODE
20
15
11
5
3
8
4
1
Table 2. Typical Max Load (mA) vs Flying Capacitor Value at
T
A
= 25
°
C, V
OUT
= –4V, F
SYNC
= 700kHz
MAX LOAD (mA)
FLYING CAPACITOR
V
CC
= 5V
VALUE (
μ
F)
DOUBLER MODE
0.1
18
0.047
17
0.033
14
0.022
12
0.01
MAX LOAD (mA)
V
CC
= 3.3V
TRIPLER MODE
25
22
20
17
9
3
Output Capacitor ESR
Output capacitor the Equivalent Series Resistance (ESR)
is another factor to consider. Excessive ESR in the output
capacitor can fool the regulation loop into keeping the
output artificially low by prematurely terminating the charg-
ing cycle. As the charge pump switches to recharge the
output, a brief surge of current flows from the flying caps
to the output cap. This current surge can be as high as
100mA under full load conditions. A typical 3.3
μ
F tantalum
capacitor has 1
or 2
of ESR; 100mA
×
2
= 200mV. If
the output is within 200mV of the set point, this additional
200mV surge will trip the feedback comparator and termi-
nate the charging cycle. The pulse dissipates quickly and
the comparator returns to the correct state, but the RS
latch will not allow the charge pump to respond until the
next clock edge. This prevents the charge pump from
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