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參數(shù)資料
| 型號： | LTC1418AIG#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 28/28頁 |
| 文件大小： | 0K |
| 描述： | IC A/D CONV 14BIT SRL&PAR 28SSOP |
| 標準包裝： | 47 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 21.5mW 單極；31.5mW 雙極 |
| 電壓電源： | 雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 28-SSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個單端，雙極；1 個差分，單極；1 個差分，雙極 |
| 配用： | DC178A-ND - BOARD SAR ADC LTC1418 |
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9
LTC1418
APPLICATIONS INFORMATION
WU
U
Referring to Figure 1, the AIN+ and AIN– inputs are con-
nected to the sample-and-hold capacitors (CSAMPLE) dur-
ing the acquire phase and the comparator offset is nulled by
the zeroing switches. In this acquire phase, a minimum
delay of 1
s will provide enough time for the sample-and-
hold capacitors to acquire the analog signal. During the
convert phase the comparator zeroing switches open,
putting the comparator into compare mode. The input
switches the CSAMPLE capacitors to ground, transferring
the differential analog input charge onto the summing
junction. This input charge is successively compared with
the binary weighted charges supplied by the differential
capacitive DAC. Bit decisions are made by the high speed
comparator. At the end of a conversion, the differential
DAC output balances the AIN
+ and AIN– input charges. The
SAR contents (a 14-bit data word) which represent the
difference of AIN+ and AIN– are loaded into the 14-bit
output latches.
DYNAMIC PERFORMANCE
The LTC1418 has excellent high speed sampling capabil-
ity. FFT (Fast Fourier Transform) test techniques are used
to test the ADC’s frequency response, distortion and noise
at the rated throughput. By applying a low distortion sine
wave and analyzing the digital output using an FFT algo-
rithm, the ADC’s spectral content can be examined for
frequencies outside the fundamental. Figure 2 shows a
typical LTC1418 FFT plot.
Signal-to-Noise Ratio
The signal-to-noise plus distortion ratio [S/(N + D)] is the
ratio between the RMS amplitude of the fundamental input
frequency to the RMS amplitude of all other frequency
components at the A/D output. The output is band limited
to frequencies from above DC and below half the sampling
frequency. Figure 2a shows a typical spectral content with
a 200kHz sampling rate and a 10kHz input. The dynamic
performance is excellent for input frequencies up to and
beyond the Nyquist limit of 100kHz.
FREQUENCY (kHz)
0
10
305070
90
AMPLITUDE
(dB)
0
–20
–40
–60
–80
–100
–120
20
40
60
80
1418 F02a
100
fSAMPLE = 200kHz
fIN = 9.9609375kHz
SFDR = 99.32
SINAD = 82.4
Figure 2a. LTC1418 Nonaveraged, 4096 Point FFT,
Input Frequency = 10kHz
FREQUENCY (kHz)
0
10
305070
90
AMPLITUDE
(dB)
0
–20
–40
–60
–80
–100
–120
20
40
60
80
1418 F02b
100
fSAMPLE = 200kHz
fIN = 97.509765kHz
SFDR = 94.29
SINAD = 81.4
Figure 2b. LTC1418 Nonaveraged, 4096 Point FFT,
Input Frequency = 97.5kHz
Effective Number of Bits
The effective number of bits (ENOBs) is a measurement of
the resolution of an ADC and is directly related to the
S/(N + D) by the equation:
N = [S/(N + D) – 1.76]/6.02
where N is the effective number of bits of resolution and
S/(N + D) is expressed in dB. At the maximum sampling
rate of 200kHz the LTC1418 maintains near ideal ENOBs
up to the Nyquist input frequency of 100kHz (refer to
Figure 3).
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