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參數(shù)資料
| 型號(hào)： | LTC1401IS8 |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 18/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC A/D CONV 12BIT W/SHTDN 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 30mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個(gè)單端，單極 |
7
LTC1401
1401fa
APPLICATIONS INFORMATION
WU
U
Conversion Details
The LTC1401 uses a successive approximation algorithm
and an internal sample-and-hold circuit to convert an
analog signal to a 12-bit serial output based on a precision
internal reference. The control logic provides an easy
interface to microprocessors and DSPs through serial
3-wire connections.
A rising edge on the CONV input starts a conversion. At the
start of a conversion the successive approximation regis-
ter (SAR) is reset. Once a conversion cycle has begun, it
cannot be restarted.
During conversion, the internal 12-bit capacitive DAC
output is sequenced by the SAR from the most significant
bit (MSB) to the least significant bit (LSB). Referring to
Figure 1, the AIN input connects to the sample-and-hold
capacitor during the acquire phase and the comparator
offset is nulled by the feedback switch. In this acquire
phase, it typically takes 315ns for the sample-and-hold
capacitor to acquire the analog signal. During the convert
phase, the comparator feedback switch opens, putting the
comparator into the compare mode. The input switches
CSAMPLE to ground, injecting the analog input charge onto
the summing junction. This input charge is successively
compared with the binary-weighted charges supplied by
the capacitive DAC. Bit decisions are made by the high
speed comparator. At the end of a conversion, the DAC
output balances the AIN input charge. The SAR contents (a
12-bit data word) which represent the input voltage, are
presented through the serial pin DOUT.
Dynamic Performance
The LTC1401 has excellent high speed sampling capabil-
ity. FFT (Fast Fourier Transform) test techniques are used
to test the ADC’s frequency response, distortion and noise
at the rated throughput. By applying a low distortion sine
wave and analyzing the digital output using an FFT algo-
rithm, the ADC’s spectral content can be examined for
frequencies outside the fundamental. Figure 2a shows a
typical LTC1401 FFT plot.
Figure 1. AIN Input
LTC1401 F01
SAMPLE
DOUT
CDAC
VDAC
DAC
AIN
CSAMPLE
–
+
COMP
S
A
R
SAMPLE
S1
HOLD
Signal-to-Noise Ratio
The signal-to-noise plus distortion ratio [S/(N+D)] is the
ratio between the RMS amplitude of the fundamental input
frequency to the RMS amplitude of all other frequency
components at the A/D output. The output is band limited
to frequencies from DC to half the sampling frequency.
Figure 2a shows a typical spectral content with a 200kHz
sampling rate and a 50kHz input. The dynamic perfor-
mance is excellent for input frequencies up to the Nyquist
limit of 100kHz as shown in Figure 2b.
FREQUENCY (kHz)
020
40
50
70
90
10
30
60
80
100
AMPLITUDE
(dB)
LTC1401 F02a
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
fSAMPLE = 200kHz
fIN = 49.853516kHz
SINAD = 68.5dB
THD = –72.4dB
VCC = 3V
TA = 25°C
Figure 2a. LTC1401 Nonaveraged, 4096 Point FFT
Plot with 50kHz Input Frequency
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| LTC1401IS8#TR | 功能描述:IC ADC 12BIT 200KSPS SHTDN 8SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):16 采樣率（每秒）:15 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:480µW 電壓電源:單電源 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:38-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:38-QFN（5x7） 包裝:帶卷 (TR) 輸入數(shù)目和類型:16 個(gè)單端，雙極；8 個(gè)差分，雙極 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
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