參數(shù)資料
型號: LTC1287BCN8
廠商: Linear Technology
文件頁數(shù): 16/16頁
文件大小: 0K
描述: IC DATA ACQ SYS 12BIT 3V 8-DIP
標準包裝: 50
類型: 數(shù)據(jù)采集系統(tǒng)(DAS)
分辨率(位): 12 b
采樣率(每秒): 30k
數(shù)據(jù)接口: 串行,并聯(lián)
電壓電源: 單電源
電源電壓: 3V
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應商設備封裝: 8-PDIP
包裝: 管件
LTC1287
9
1287fa
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
such as obtained from a voltage regulator (e.g., LT1117).
For high frequency bypassing a 0.1
F ceramic disk placed
in parallel with the 22
F is recommended. Again the leads
should be kept to a minimum. Using a battery to power the
LTC1287 will help reduce the amount of bypass capacitance
required on the VCC pin. A battery placed close to the
device will only require 10
F to adequately bypass the
supply pin. Figure 4 shows the effect of poor VCCbypassing.
Figure 5 shows the settling of a LT1117 low dropout
regulator with a 22
F bypass capacitor. The noise and
ripple is kept around 0.5mV. Figure 6 shows the response
of a lithium battery with a 10
F bypass capacitor. The
noise and ripple is kept below 0.5mV.
Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1287 have
Figure 5. LT1117 Regulator with 22
F Bypassing on VCC
CS
5V/DIV
VCC
0.5mV/DIV
HORIZONTAL: 20
s/DIV
Figure 6. Lithium Battery with 10
F Bypassing on VCC
CS
5V/DIV
VCC
0.5mV/DIV
HORIZONTAL: 20
s/DIV
capacitive switching input current spikes. These current
spikes settle quickly and do not cause a problem. If large
source resistances are used or if slow settling op amps
drive the inputs, take care to insure the transients caused
by the current spikes settle completely before the
conversion begins.
Source Resistance
The analog inputs of the LTC1287 look like a 100pF
capacitor (CIN) in series with a 1.5k resistor (RON). This
value for RON is for VCC = 2.7V. With larger supply voltages
RON will be reduced. For example, with VCC = 2.7V and V
= – 2.7V, RON becomes 500. CIN gets switched between
(+) and (–) inputs once during each conversion cycle.
Large external source resistors and capacitances will slow
the settling of the inputs. It is important that the overall RC
time constant is short enough to allow the analog inputs
to settle completely within the allowed time.
Figure 7. Analog Input Equivalent Circuit
HORIZONTAL: 10
s/DIV
Figure 4. Poor VCC Bypassing. Noise and
Ripple Can Cause A/D Errors
CS
RON = 1.5k
tWHCS +
1/2 CLK
CIN =
100pF
LTC1287
“+”
INPUT
RSOURCE +
VIN +
C1
“–”
INPUT
RSOURCE
VIN
C2
LTC1287 F07
VERTICAL:
0.5mV/DIV
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