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參數(shù)資料
| 型號： | LTC1174-5 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | High Efficiency Step-Down and Inverting DC/DC Converter(高效率,步降DC/DC變換器) |
| 中文描述： | 高效率降壓和倒轉DC / DC轉換器（高效率，步降直流/直流變換器） |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 246K |
| 代理商： | LTC1174-5 |
6
LTC1174
LTC1174-3.3/LTC1174-5
(Pin 1 connection shown for LTC1174-3.3 and LTC1174-5, changes create LTC1174)
(Refer to Functional Diagram)
The LTC1174 uses a constant off-time architecture to
switch its internal P-channel power MOSFET. The off-time
is set by an internal timing capacitor and the operating
frequency is a function of V
IN
.
The output voltage is set by an internal resistive divider
(LTC1174-3.3 and LTC1174-5) or an external divider re-
turned to V
FB
Pin 1 (LTC1174). A voltage comparator A1
compares the divided output voltage to a reference voltage
of 1.25V.
To optimize efficiency, the LTC1174 automatically switches
between continuous and Burst Mode
TM
operation. The volt-
age comparator is the primary control element when the
device is in Burst Mode operation, while the current com-
parator controls the output voltage in continuous mode.
During the switch“ON” time, switch current flows through
the 0.1
sense resistor. When this current reaches the
threshold of the current comparator A2, its output signal will
change state, setting the flip-flop and turning the switch off.
Burst Mode is a trademark of Linear Technology Corporation.
The timing capacitor, C
T
, begins to discharge until its
voltage goes below V
TH1
. Comparator A4 will then trip,
which resets the flip-flop and causes the switch to turn on
again. Also, the timing capacitor is recharged. The inductor
current will again ramp up until the current comparator A2
trips. The cycle then repeats.
When the load is relatively light, the LTC1174 automatically
goes into Burst Mode
operation. The current mode loop is
interrupted when the output voltage reaches the desired
regulated value. The hysteretic voltage comparator A1 trips
when V
OUT
is above the desired output voltage, shutting off
the switch and causing the timing capacitor to discharge.
This capacitor discharges past V
TH1
until its voltage drops
below V
TH2
. Comparator A5 then trips and a sleep signal is
generated.
In sleep mode, the LTC1174 is in standby and the load
current is supplied by the output capacitor. All unused
FU
W
–
+
V
TH2
–
+
–
+
V
LIM2
V
LIM1
I
PGM
7
R
SENSE
0.1
RESET
V
TH1
LB
OUT
2
1174 BD
g
m
V
FB
1.25V
REFERENCE
Q
GND 4
5
SW
1
×
V
OUT
(V
FB
)
–
+
A1
R1*
31.5k
SET
6
V
IN
LB
IN
3
SHUTDOWN
8
C
T
SLEEP
–
+
A3
A4
A5
V
FB
* R1 = 51k FOR LTC1174-3.3
R1 = 93.5k FOR LTC1174-5
A2
OPERATIOU
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