參數(shù)資料
型號(hào): LTC1066-1
廠商: Linear Technology Corporation
英文描述: 14-Bit DC Accurate Clock-Tunable, 8th Order Elliptic or Linear Phase Lowpass Filter(14位直流精度,時(shí)鐘可調(diào),8階橢圓形或線性相位低通濾波器)
中文描述: 14位直流精確時(shí)鐘可調(diào),8階橢圓型或線性相位低通濾波器(14位直流精度,時(shí)鐘可調(diào),8階橢圓形或線性相位低通濾波器)
文件頁數(shù): 9/16頁
文件大?。?/td> 302K
代理商: LTC1066-1
9
LTC1066-1
TEST CIR
1066-1 TC01
NOTE:
RC COMPENSATION BETWEEN PINS 11 AND 13 IS
REQUIRED ONLY FOR CLOCK-TUNABLE OPERATION FOR:
50kHz < f
CUTOFFs
100kHz.
THE TEST SPECIFICATIONS FOR:
f
CLK
= 2MHz, f
CUTOFF
= 40kHz, AND
f
CLK
= 4MHz, f
CUTOFF
= 80kHz
INCLUDE THE EFFECTS OF RC COMPENSATION.
COMPENSATION DOES NOT INFLUECE THE SPECIFICATIONS
FOR:
f
CLK
= 400kHz, f
CUTOFF
= 8kHz.
FOR CLOCK-TUNABLE f
CUTOFFs
FROM 2kHz TO 50kHz
COMPENSATION IS NOT REQUIRED AND THE FILTER’S
PASSBAND PERFORMANCE IS REPRESENTED BY THE
TYPICAL SPECIFICATIONS AT:
f
CLK
= 400kHz, f
CUTOFF
= 8kHz.
V
+
V
+
V
V
V
+
V
OUT
V
IN
f
(DUTY CYCLE
= 50% ±10%
)
ELLIPTIC
RESPONSE
50:1
LINEAR PHASE
RESPONSE
100:1
1
μ
F
0.1
μ
F
15pF
0.1
μ
F
0.1
μ
F
10k
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
20k
20
30k
LTC1066-1
0.1
μ
F
20
OUT A
–IN A
+IN A
V
V
+
CONNECT 1
FILTER
OUT
50/100
CLK
V
+
OUT B
+IN B
GND
FILTER
IN
COMP 2
CONNECT 2
COMP 1
V
APPLICATIO
S I
N
FOR
ATIO
U
DC PERFORMANCE
The DC performance of the LTC1066-1 is dictated by the
DC characteristics of the input precision op amp.
1. DC input voltages in the vicinity of the filter’s half of the
total power supply are processed with exactly 0dB (or
1V/V) of gain.
2. The typical DC input voltage ranges are equal to:
V
IN
=
±
5.8V, V
S
=
±
7.5V
V
IN
=
±
3.6V, V
S
=
±
5V
V
IN
=
±
1.4V, V
S
=
±
2.5V
With an input DC voltage range of V
IN
=
±
5V, (V
S
=
±
7.5V), the measured CMRR was 100dB. Figure 1
shows the DC gain linearity of the filter exceeding the
requirements of a 14-bit, 10V full scale system.
3. The filter output DC offset V
OS(OUT)
is measured with
the input grounded and with dual power supplies. The
V
OS(OUT)
is typically
±
0.1mV and it is optimized for the
filter connection shown in the test circuit figure. The
filter output offset is equal to:
V
OS(OUT)
= V
OS
(op amp A) –I
BIAS
×
R
F
= 0.1mV (Typ)
4. The V
OS(OUT)
temperature drift is typically 7
μ
V/
°
C
(T
A
> 25
°
C), and –7
μ
V/
°
C (T
A
< 25
°
C).
5. The V
OS(OUT)
temperature drift can be improved by
using an input resistor R
IN
equal to the feedback resis-
W
U
INPUT VOLTAGE (VDC)
–6 –5
–3
–1
1
3
5
V
I
O
μ
V
75
50
25
0
–25
–50
–75
–100
–125
2
1066-1 F01
–4
–2
0
4
6
V
S
= ±7.5V
T
A
= 25°C
f
CLK
= 1MHz
f
C
= 20kHz
Figure 1. DC Gain Linearity
tor R
F
, however, the absolute value of V
OS(OUT)
will
increase. For instance, if a 20k resistor is added in series
with pin 3 (see Test Circuit), the output V
OS
drift will be
improved by 2
μ
V/
°
C to 3
μ
V/
°
C, however, the V
OS(OUT)
may increase by 1mV
(MAX)
.
6. The filter DC output offset voltage V
OS(OUT)
is indepen-
dent from the filter clock frequency (f
CLK
250kHz).
Figures 2 and 3 show the V
OS(OUT)
variation for three
different power supplies and for clock frequencies up to
5MHz. Both figures were traced with the LTC1066-1
soldered into the PC board. Power supply decoupling is
very important, especially with
±
7.5V supplies. If nec-
essary connect a small resistor (20
) between pins 5
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