IN+ Q8 Q19 Q20 R1 R8 7M R6 R7 R2 30k D3
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� LT6002CDHC#PBF
寤犲晢锛� Linear Technology
鏂囦欢闋佹暩(sh霉)锛� 3/20闋�
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鎻忚堪锛� IC OP AMP R-R 1.8V QUAD 16-DFN
妯欐簴鍖呰锛� 73
鏀惧ぇ鍣ㄩ鍨嬶細 閫氱敤
闆昏矾鏁�(sh霉)锛� 4
杓稿嚭椤炲瀷锛� 婊挎摵骞�
杞�(zhu菐n)鎻涢€熺巼锛� 0.018 V/µs
澧炵泭甯跺绌嶏細 60kHz
闆绘祦 - 杓稿叆鍋忓锛� 4nA
闆诲 - 杓稿叆鍋忕Щ锛� 500µV
闆绘祦 - 闆绘簮锛� 20µA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 10mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 1.8 V ~ 16 V锛�±0.9 V ~ 8 V
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瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
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鍖呰锛� 绠′欢
LT6000/LT6001/LT6002
11
600012fa
Q1
Q17
Q6
Q2
Q10
C1
Q3
IN+
Q8
Q19
Q20
R1
R8
7M
R6
R7
R2
30k
D3
V+
V鈥�
R4
R5
IN鈥�
R3
30k
Q9
Q11
Q14
V+
OUT
V鈥�
SHDN
V鈥�
Q15
CM
Q13
COMPLEMENTARY
DRIVE GENERATOR
Q12
Q4
Q5
Q7
Q16
Q18
APPLICATIO S I FOR ATIO
WU
UU
Supply Voltage
The positive supply of the LT6000/LT6001/LT6002 should
be bypassed with a small capacitor (about 0.01
F) within
an inch of the pin. When driving heavy loads, an additional
4.7
F electrolytic capacitor should be used. When using
split supplies, the same is true for the negative supply pin.
Rail-to-Rail Characteristics
The LT6000/LT6001/LT6002 are fully functional for an
input signal range from the negative supply to the positive
supply. Figure 1 shows a simplified schematic of the
amplifier. The input stage consists of two differential
amplifiers, a PNP stage Q3/Q6 and an NPN stage Q4/Q5
that are active over different ranges of the input common
mode voltage. The PNP stage is active for common mode
voltages, VCM, between the negative supply to approxi-
mately 1V below the positive supply. As VCM moves closer
towards the positive supply, the transistor Q7 will steer
Q2鈥檚 tail current to the current mirror Q8/Q9, activating the
NPN differential pair. The PNP pair becomes inactive for
the rest of the input common mode range up to the
positive supply.
The second stage is a folded cascode and current mirror
that converts the input stage differential signals into a
single ended output. Capacitor C1 reduces the unity cross
frequency and improves the frequency stability without
degrading the gain bandwidth of the amplifier. The comple-
mentary drive generator supplies current to the output
transistors that swing from rail to rail.
Input
The input bias current depends on which stage is active.
The input bias current polarity depends on the input
common mode voltage. When the PNP stage is active, the
input bias currents flow out of the input pins. They flow in
the opposite direction when the NPN stage is active. The
offset error due to the input bias currents can be
minimized by equalizing the noninverting and inverting
source impedance.
Figure 1
SI PLIFIED SCHE ATIC
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鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
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TA45-ABDRF100C0 CIRCUIT BRKR THERMAL 10A 2POLE
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鍙冩暩(sh霉)鎻忚堪
LT6002CGN 鍒堕€犲晢:LINER 鍒堕€犲晢鍏ㄧū:Linear Technology 鍔熻兘鎻忚堪:Single, Dual and Quad, 1.8V, 13uA Precision Rail-to-Rail Op Amps
LT6002CGN#PBF 鍔熻兘鎻忚堪:IC OP AMP R-R QUAD 16-SSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯欐簴鍖呰:50 绯诲垪:LinCMOS™ 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:0.05 V/µs 澧炵泭甯跺绌�:110kHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:0.7pA 闆诲 - 杓稿叆鍋忕Щ:210µV 闆绘祦 - 闆绘簮:57µA 闆绘祦 - 杓稿嚭 / 閫氶亾:30mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):3 V ~ 16 V锛�±1.5 V ~ 8 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-SOIC锛�0.154"锛�3.90mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-SOIC 鍖呰:绠′欢 鐢�(ch菐n)鍝佺洰閷勯爜闈�:865 (CN2011-ZH PDF) 鍏跺畠鍚嶇ū:296-1834296-1834-5
LT6002CGN#TRPBF 鍔熻兘鎻忚堪:IC OP AMP QUAD R-R 16-SSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯欐簴鍖呰:50 绯诲垪:LinCMOS™ 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:0.05 V/µs 澧炵泭甯跺绌�:110kHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:0.7pA 闆诲 - 杓稿叆鍋忕Щ:210µV 闆绘祦 - 闆绘簮:57µA 闆绘祦 - 杓稿嚭 / 閫氶亾:30mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):3 V ~ 16 V锛�±1.5 V ~ 8 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-SOIC锛�0.154"锛�3.90mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-SOIC 鍖呰:绠′欢 鐢�(ch菐n)鍝佺洰閷勯爜闈�:865 (CN2011-ZH PDF) 鍏跺畠鍚嶇ū:296-1834296-1834-5
LT6002IDHC 鍒堕€犲晢:LINER 鍒堕€犲晢鍏ㄧū:Linear Technology 鍔熻兘鎻忚堪:Single, Dual and Quad, 1.8V, 13uA Precision Rail-to-Rail Op Amps
LT6002IDHC#PBF 鍔熻兘鎻忚堪:IC OP AMP R-R 1.8V QUAD 16-DFN RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 鍏跺畠鏈夐棞(gu膩n)鏂囦欢:Automotive Product Guide 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯欐簴鍖呰:1 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):1 杓稿嚭椤炲瀷:婊挎摵骞� 杞�(zhu菐n)鎻涢€熺巼:3 V/µs 澧炵泭甯跺绌�:10MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:1pA 闆诲 - 杓稿叆鍋忕Щ:70µV 闆绘祦 - 闆绘簮:2.5mA 闆绘祦 - 杓稿嚭 / 閫氶亾:48mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):2.7 V ~ 5.5 V锛�±1.35 V ~ 2.75 V 宸ヤ綔婧害:-40°C ~ 125°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:SOT-23-6 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:SOT-6 鍖呰:Digi-Reel® 鍏跺畠鍚嶇ū:MAX4475AUT#TG16DKR
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