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| 型號(hào)： | LT4356HDE-2#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類(lèi)： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO12 |
| 封裝： | 4 X 3 MM, PLASTIC, MO-229WGED, DFN-12 |
| 文件頁(yè)數(shù)： | 6/26頁(yè) |
| 文件大小： | 231K |
| 代理商： | LT4356HDE-2#TR |
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LT4356-1/LT4356-2
14
4356fa
APPLICATIONS INFORMATION
MOSFET stress is the result of power dissipated within
the device. For long duration surges of 100ms or more,
stress is increasingly dominated by heat transfer; this is
a matter of device packaging and mounting, and heatsink
thermal mass. This is analyzed by simulation, using the
MOSFET thermal model.
For short duration transients of less than 100ms, MOSFET
survival is increasingly a matter of safe operating area
(SOA), an intrinsic property of the MOSFET. SOA quanti-
es the time required at any given condition of VDS and
ID to raise the junction temperature of the MOSFET to its
rated maximum. MOSFET SOA is expressed in units of
watt-squared-seconds (P2t). This gure is essentially con-
stant for intervals of less than 100ms for any given device
type, and rises to innity under DC operating conditions.
Destruction mechanisms other than bulk die temperature
distort the lines of an accurately drawn SOA graph so that
P2t is not the same for all combinations of ID and VDS.
In particular P2t tends to degrade as VDS approaches the
maximum rating, rendering some devices useless for
absorbing energy above a certain voltage.
Calculating Transient Stress
To select a MOSFET suitable for any given application, the
SOA stress must be calculated for each input transient
which shall not interrupt operation. It is then a simple matter
to chose a device which has adequate SOA to survive the
maximum calculated stress. P2t for a prototypical transient
waveform is calculated as follows (Figure 4).
Let
a = VREG – VIN
b = VPK – VIN
(VIN = Nominal Input Voltage)
Then
P2t = ILOAD
2 1
3
tr
b
a
(
)3
b
+
1
2
τ 2a2 ln
b
a
+ 3a2 + b2 4ab
Typically VREG ≈ VIN and τ >> tr simplifying the above to
P2t =
1
2
ILOAD
2 V
PK –VREG
()2 τ (W2s)
For the transient conditions of VPK = 80V, VIN = 12V, VREG
= 16V, tr = 10μs and τ = 1ms, and a load current of 3A, P2t
is 18.4W2s—easily handled by a MOSFET in a D-pak pack-
age. The P2t of other transient waveshapes is evaluated by
integrating the square of MOSFET power versus time.
Calculating Short-Circuit Stress
SOA stress must also be calculated for short-circuit condi-
tions. Short-circuit P2t is given by:
P2t = (VIN ΔVSNS/RSNS)2 tTMR
(W2s)
where,
ΔVSNS is the SENSE pin threshold, and tTMR is the
overcurrent timer interval.
For VIN = 14.7V, VSNS = 50mV, RSNS = 12mΩ and CTMR
= 100nF, P2t is 6.6W2s—less than the transient SOA
calculated in the previous example. Nevertheless, to
account for circuit tolerances this gure should be doubled
to 13.2W2s.
Limiting Inrush Current and GATE Pin Compensation
The LT4356 limits the inrush current to any load capacitance
by controlling the GATE pin voltage slew rate. An external
capacitor can be connected from GATE to ground to slow
down the inrush current further at the expense of slower
turn-off time. The gate capacitor is set at:
C1 =
I
GATE(UP)
INRUSH
CL
Figure 4. Safe Operating Area Required to Survive Prototypical
Transient Waveform
VPK
VIN
4356 F04
VREG
tr
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LT4356HMS-1 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO10 |
| LT4356CDE-1#TR | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO12 |
| LT4356HS-2#TR | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16 |
| LT4356MPS-2#TR | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| LT4356MPS-2 | SPECIALTY ANALOG CIRCUIT, PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LT4356HDE-3 | 功能描述:IC REG OVP FAULT TIMER 12DFN RoHS:否 類(lèi)別:過(guò)電壓，電流，溫度裝置 >> 電涌抑制 IC 系列:- 產(chǎn)品培訓(xùn)模塊:LT4356 Surge Stopper 產(chǎn)品目錄繪圖:LT4356 Output Graph LT4356 Series 10-MSOP 標(biāo)準(zhǔn)包裝:2,500 系列:- 電壓 - 工作:4 ~ 80V 電壓 - 箝位:27V，可調(diào) 技術(shù):混合技術(shù) 功率（瓦特）:- 電路數(shù):1 應(yīng)用:自動(dòng) 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:10-MSOP 包裝:帶卷 (TR) 配用:DC1018B-C-ND - DEMO BOARD FOR LT4356-3DC1018B-B-ND - DEMO BOARD FOR LT4356-2DC1018B-A-ND - DEMO BOARD FOR LT4356-1 |
| LT4356HDE-3#PBF | 功能描述:IC REG OVP W/LATCHOFF 12DFN RoHS:是 類(lèi)別:過(guò)電壓，電流，溫度裝置 >> 電涌抑制 IC 系列:- 產(chǎn)品培訓(xùn)模塊:LT4356 Surge Stopper 產(chǎn)品目錄繪圖:LT4356 Output Graph LT4356 Series 10-MSOP 標(biāo)準(zhǔn)包裝:2,500 系列:- 電壓 - 工作:4 ~ 80V 電壓 - 箝位:27V，可調(diào) 技術(shù):混合技術(shù) 功率（瓦特）:- 電路數(shù):1 應(yīng)用:自動(dòng) 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:10-MSOP 包裝:帶卷 (TR) 配用:DC1018B-C-ND - DEMO BOARD FOR LT4356-3DC1018B-B-ND - DEMO BOARD FOR LT4356-2DC1018B-A-ND - DEMO BOARD FOR LT4356-1 |
| LT4356HDE-3#PBF | 制造商:Linear Technology 功能描述:IC, SURGE STOPPER, 16V, DFN-12 |
| LT4356HDE-3#TRPBF | 功能描述:IC REG OVP FAULT TIMER 12DFN RoHS:是 類(lèi)別:過(guò)電壓，電流，溫度裝置 >> 電涌抑制 IC 系列:- 產(chǎn)品培訓(xùn)模塊:LT4356 Surge Stopper 產(chǎn)品目錄繪圖:LT4356 Output Graph LT4356 Series 10-MSOP 標(biāo)準(zhǔn)包裝:2,500 系列:- 電壓 - 工作:4 ~ 80V 電壓 - 箝位:27V，可調(diào) 技術(shù):混合技術(shù) 功率（瓦特）:- 電路數(shù):1 應(yīng)用:自動(dòng) 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:10-MSOP 包裝:帶卷 (TR) 配用:DC1018B-C-ND - DEMO BOARD FOR LT4356-3DC1018B-B-ND - DEMO BOARD FOR LT4356-2DC1018B-A-ND - DEMO BOARD FOR LT4356-1 |
| LT4356HDE-3PBF | 制造商:Linear Technology 功能描述:Surge Protection Adj Regulator 4-80V 7uA |
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