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參數(shù)資料
| 型號(hào)： | LT3582EUD-5#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.72 A SWITCHING REGULATOR, PQCC16 |
| 封裝： | 3 X 3 MM, LEAD FREE, PLASTIC, MO-220WEED-2, QFN-16 |
| 文件頁數(shù)： | 9/28頁 |
| 文件大?。?/td> | 315K |
| 代理商： | LT3582EUD-5#TRPBF |
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LT3582/LT3582-5/LT3582-12
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3582512fb
Conguration Lockout (LOCK bit)
After a desired conguration is programmed into OTP, the
LOCK bit can be set to prohibit subsequent changes to the
conguration. The LT3582-5 and LT3582-12 are precon-
gured with the LOCK bit set to a logic “1” which:
Forces the chip to use the OTP conguration only.
Forces all I2C reads from addresses 0-2 to return OTP
data.
Prohibits any further programming of the OTP memory.
Any further attempts to program OTP leaves the OTP
memory unchanged and sets the FAULT bit in the
CMDR.
The LOCK OTP bit is set by programming a logic “1” into
bit 6 of OTP2. Regardless of the RSEL2 setting, I2C reads
of the LOCK bit always indicate the LOCKed or unlocked
state of the OTP memory.
OTP Programming (LT3582 only)
The LT3582 contains One Time Programmable non-vola-
tile memory to permanently store the chip conguration.
Before programming, it’s recommended to set the SWOFF
bit to disable switching activity and prevent unexpected
chip behavior while the conguration is being changed.
Programming involves the transfer of information from
the REG bytes to the OTP bytes. Therefore, valid data must
rst be written to the desired REG bytes. After the REG
bytes are written, they are selected by setting the cor-
responding RSEL bits in the CMDR. This forces the chip
into the desired conguration and selects those bytes for
programming to OTP. After 15V has been applied to VPP,
the WOTP bit is set in the CMDR to start the programming.
Finally, the WOTP bit is cleared to nish the programming.
An example programming algorithm is given below.
OTP programming draws about 3mA to 6mA per bit from
the VPP pin. It is possible to program all 23 bits simultane-
ously (up to ~138mA), but it is recommended that one byte
is programmed at a time to reduce noise on VPP caused
by the sudden change in current. A 1-10μF VPP bypass
capacitor is also recommended to prevent voltage droop
after programming begins. Also, avoid hot-plugging VPP
which results in very fast voltage ramp rates and can lead
to excessive voltage on the VPP pin.
Example OTP Programming Algorithm:
1. Apply 15V to the VP-P pin. This can be done at any
time before step 5.
2. Write 50h to the CMDR. This disables the power
switches during programming by setting the SWOFF
bit in the CMDR. This also clears the FAULT bit.
3. Write desired data to REG0-REG2.
4. Write 11h to the CMDR. This selects REG0 for pro-
gramming while keeping the switches off.
5. Write 91h to the CMDR. This programs the REG0 data
to OTP0.
6. Write 11h to the CMDR. This command can be sent im-
mediately after step 5. This stops the programming.
7. Read the CMDR and verify that the FAULT bit is not
set.
8. Repeat steps 4-7 for the remaining bytes that need
programming.
9. Write 10h to the CMDR. This selects the OTP data for
read verication.
10. Read the OTP data and verify the contents.
11. Write 00h to CMDR. This enables the power switches
and the chip will operate from the OTP congura-
tion.
12. Float the VPP pin. This can be done at any time after
step 8.
APPLICATIONS INFORMATION
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