參數(shù)資料
型號(hào): LT3470ITS8#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.2 A SWITCHING REGULATOR, PDSO8
封裝: 1 MM HEIGHT, LEAD FREE, PLASTIC, MO-193, SOT-23, 8 PIN
文件頁(yè)數(shù): 6/20頁(yè)
文件大?。?/td> 256K
代理商: LT3470ITS8#PBF
14
LT3470
3470fc
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LT3470. However, these capacitors
can cause problems if the LT3470 is plugged into a live
supply (see Linear Technology Application Note 88 for a
complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an under damped tank circuit, and the
voltage at the VIN pin of the LT3470 can ring to twice the
nominal input voltage, possibly exceeding the LT3470’s
rating and damaging the part. If the input supply is poorly
controlled or the user will be plugging the LT3470 into an
energized supply, the input network should be designed to
prevent this overshoot. Figure 6 shows the waveforms
that result when an LT3470 circuit is connected to a 24V
supply through six feet of 24-gauge twisted pair. The first
plot is the response with a 2.2
F ceramic capacitor at the
input. The input voltage rings as high as 35V and the input
current peaks at 20A. One method of damping the tank
circuit is to add another capacitor with a series resistor to
the circuit. In Figure 6b an aluminum electrolytic capacitor
has been added. This capacitor’s high equivalent series
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of
the circuit, though it is likely to be the largest component
in the circuit. An alternative solution is shown in Figure 6c.
A 1
resistor is added in series with the input to eliminate
APPLICATIO S I FOR ATIO
WU
UU
the voltage overshoot (it also reduces the peak input
current). A 0.1
Fcapacitorimproveshighfrequencyfilter-
ing. This solution is smaller and less expensive than the
electrolytic capacitor. For high input voltages its impact on
efficiency is minor, reducing efficiency less than one half
percent for a 5V output at full load operating from 24V.
High Temperature Considerations
The die junction temperature of the LT3470 must be lower
than the maximum rating of 125
°C(150°CfortheHgrade).
This is generally not a concern unless the ambient tem-
perature is above 85
°C. For higher temperatures, care
should be taken in the layout of the circuit to ensure good
heat sinking of the LT3470. The maximum load current
should be derated as the ambient temperature approaches
the maximum junction rating. The die temperature is
calculated by multiplying the LT3470 power dissipation
by the thermal resistance from junction to ambient.
Power dissipation within the LT3470 can be estimated by
calculating the total power loss from an efficiency mea-
surement. Thermal resistance depends on the layout of
the circuit board and choice of package. The DD package
with the exposed pad has a thermal resistance of approxi-
mately 80
°C/W while the ThinSOT is approximately
150
°C/W. Finally, be aware that at high ambient tempera-
tures the internal Schottky diode will have significant
leakage current (see Typical Performance Characteris-
tics) increasing the quiescent current of the LT3470
converter.
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