LTC3412A
7
3412afb
SVIN (Pin 1/Pin 11): Signal Input Supply. Decouple this
pin to SGND with a capacitor.
PGOOD (Pin 2/Pin 12): Power Good Output. Open-drain
logic output that is pulled to ground when the output
voltage is not within
±7.5% of regulation point.
ITH (Pin 3/Pin 13): Error Amplifier Compensation Point.
The current comparator threshold increases with this
control voltage. Nominal voltage range for this pin is from
0.2V to 1.4V with 0.4V corresponding to the zero-sense
voltage (zero current).
VFB (Pin 4/Pin 14): Feedback Pin. Receives the feedback
voltage from a resistive divider connected across the
output.
RT (Pin 5/Pin 15): Oscillator Resistor Input. Connecting a
resistor to ground from this pin sets the switching fre-
quency.
SYNC/MODE (Pin 6/Pin 16): Mode Select and External
Clock Synchronization Input. To select forced continuous,
tie to SVIN. Connecting this pin to a voltage between 0V and
1V selects Burst Mode operation with the burst clamp set
to the pin voltage.
UU
U
PI FU CTIO S
RUN/SS (Pin 7/Pin 1): Run Control and Soft-Start Input.
Forcing this pin below 0.5V shuts down the LTC3412A. In
shutdown all functions are disabled drawing < 1
μA of
supply current. A capacitor to ground from this pin sets the
ramp time to full output current.
SGND (Pin 8/Pin 2): Signal Ground. All small-signal
components, compensation components and the exposed
pad on the bottom side of the IC should connect to this
ground, which in turn connects to PGND at one point.
PVIN(Pins9,16/Pins3,10):PowerInputSupply.Decouple
this pin to PGND with a capacitor.
SW (Pins 10, 11, 14, 15/Pins 4, 5, 8, 9): Switch Node
Connection to the Inductor. This pin connects to the drains
of the internal main and synchronous power MOSFET
switches.
PGND (Pins 12, 13/Pins 6, 7): Power Ground. Connect
this pin close to the (–) terminal of CIN and COUT.
Exposed Pad (Pin 17/Pin 17): Signal Ground. Must be
soldered to PCB for electrical connection and rated ther-
mal performance.
(FE Package/UHF Package)