參數(shù)資料
型號(hào): LT1956-5IGN
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 3 A SWITCHING REGULATOR, 570 kHz SWITCHING FREQ-MAX, PDSO16
封裝: 0.150 INCH, PLASTIC, SSOP-16
文件頁數(shù): 14/24頁
文件大小: 437K
代理商: LT1956-5IGN
21
LT1956/LT1956-5
APPLICATIO S I FOR ATIO
WU
UU
VOUT
5V
VOUT
–5V
* L1 IS A SINGLE CORE WITH TWO WINDINGS
COILTRONICS #CTX33-2P
IF LOAD CAN GO TO ZERO, AN OPTIONAL
PRELOAD OF 1k TO 5k MAY BE USED TO
IMPROVE LOAD REGULATION
D1, D3: 10MQ060N
VIN
12V
(TRANSIENTS
TO 60V)
GND
1956 F13
C2
0.1
F
CC
1nF
D1
C1
100
F
10V TANT
C5
100
F
10V TANT
C3
2.2
F
50V
CERAMIC
C4
100
F
10V
TANT
D2
1N914
D3
L1A*
18
H
L1B*
R1
15.4k
R2
4.99k
+
BOOST
VIN
LT1956
SHDN
SYNC
SW
FB
VC
GND
Figure 13. Dual Output SEPIC Converter
As the output starts to rise, Q1 turns on, regulating switch
current via the VC pin to maintain a constant dv/dt at the
output. Output rise time is controlled by the current
through CSS defined by R4 and Q1’s VBE. Once the output
is in regulation, Q1 turns off and the circuit operates
normally. R3 is transient protection for the base of Q1.
RiseTime
RC
V
SS
OUT
BE
= ()(
)( )
4
Using the values shown in Figure 10,
Rise Time
ms
= ()(
)()
=
47 10
15 10
5
07
5
39
.
The ramp is linear and rise times in the order of 100ms are
possible. Since the circuit is voltage controlled, the ramp
rate is unaffected by load characteristics and maximum
output current is unchanged. Variants of this circuit can be
used for sequencing multiple regulator outputs.
DUAL OUTPUT SEPIC CONVERTER
The circuit in Figure 13 generates both positive and
negative 5V outputs with a single piece of magnetics. The
two inductors shown are actually just two windings on a
standard Coiltronics inductor. The topology for the 5V
output is a standard buck converter. The – 5V topology
would be a simple flyback winding coupled to the buck
converter if C4 were not present. C4 creates a SEPIC
(single-ended primary inductance converter) topology
which improves regulation and reduces ripple current in
L1. Without C4, the voltage swing on L1B compared to
L1A would vary due to relative loading and coupling
losses. C4 provides a low impedance path to maintain an
equal voltage swing in L1B, improving regulation. In a
flyback converter, during switch on time, all the converter’s
energy is stored in L1A only, since no current flows in L1B.
At switch off, energy is transferred by magnetic coupling
into L1B, powering the – 5V rail. C4 pulls L1B positive
during switch on time, causing current to flow, and energy
to build in L1B and C4. At switch off, the energy stored in
both L1B and C4 supply the –5V rail. This reduces the
current in L1A and changes L1B current waveform from
square to triangular. For details on this circuit, including
maximum output currents, see Design Note 100.
POSITIVE-TO-NEGATIVE CONVERTER
The circuit in Figure 14 is a classic positive-to-negative
topology using a grounded inductor. It differs from the
standard approach in the way the IC chip derives its
feedback signal because the LT1956 accepts only positive
feedback signals. The ground pin must be tied to the
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