參數(shù)資料
型號(hào): LT1807IS8#TRPBF
廠商: Linear Technology
文件頁(yè)數(shù): 9/28頁(yè)
文件大?。?/td> 0K
描述: IC OPAMP R-R I/O DUAL LN 8SOIC
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 通用
電路數(shù): 2
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 140 V/µs
增益帶寬積: 325MHz
電流 - 輸入偏壓: 5µA
電壓 - 輸入偏移: 100µV
電流 - 電源: 11mA
電流 - 輸出 / 通道: 85mA
電壓 - 電源,單路/雙路(±): 2.5 V ~ 12.6 V,±1.25 V ~ 6.3 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
LT1806/LT1807
17
18067fc
Rail-to-Rail Characteristics
The LT1806/LT1807 have input and output signal range that
covers from negative power supply to positive power sup-
ply. Figure 1 depicts a simplied schematic of the amplier.
The input stage is comprised of two differential ampliers,
a PNP stage Q1/Q2 and a NPN stage Q3/Q4 that are active
over different ranges of common mode input voltage. The
PNP differential pair is active between the negative supply
to approximately 1.5V below the positive supply. As the
input voltage moves closer toward the positive supply, the
transistor Q5 will steer the tail current I1 to the current
mirror Q6/Q7, activating the NPN differential pair. The PNP
pair becomes inactive for the rest of the input common
mode range up to the positive supply.
APPLICATIONS INFORMATION
A pair of complementary common emitter stages Q14/Q15
that enable the output to swing from rail to rail constructs
the output stage. The capacitors C1 and C2 form the
local feedback loops that lower the output impedance at
high frequency. These devices are fabricated on Linear
Technology’s proprietary high speed complementary
bipolar process.
Power Dissipation
The LT1806/LT1807 ampliers combine high speed with
large output current in a small package, so there is a need
to ensure that the die’s junction temperature does not
exceed 150°C. The LT1806 is housed in an SO-8 package
or a 6-lead SOT-23 package and the LT1807 is in an SO-8
Q4
Q6
Q3
Q7
Q10
Q1
Q13
Q15
OUT
Q2
Q11
Q12
Q9
Q5
VBIAS
I1
D2
D1
D5
D4
D3
D6
D7
D8
ESDD2
ESDD1
+IN
–IN
V
ESDD3
ESDD4
V+
V
Q8
R2
R1
R3
R4
R5
Q14
18067 F01
+
I2
C2
CC
V
+
C1
BUFFER
AND
OUTPUT BIAS
Q17
Q16
ESDD5
SHDN
V+
V
R7
100k
R6
40k
D9
V+
V
ESDD6
BIAS
GENERATION
Figure 1. LT1806 Simplied Schematic Diagram
相關(guān)PDF資料
PDF描述
77311-818-11LF CONN HEADER .100 SINGL STR 11POS
044803.5MR FUSE 3.5A 125V FAST NANO2 SMD
LT1807IS8#TR IC OPAMP R-R I/O DUAL LN 8SOIC
929836-01-04 CONN HEADER 8POS DUAL .100 TIN
961208-5804-AR CONN HEADER R/A DUAL 8POS GOLD
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