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參數(shù)資料
| 型號： | LT1248IS#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 3/12頁 |
| 文件大小： | 164K |
| 描述： | IC PFC CTRLR AVERAGE CURR 16SOIC |
| 標準包裝： | 50 |
| 模式： | 平均電流 |
| 頻率 - 開關： | 300kHz |
| 電流 - 啟動： | 250µA |
| 電源電壓： | 15.5 V ~ 27 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 16-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1338 (CN2011-ZH PDF) |
3
LT1248
I
M
I
AC
(VA
OUT
2)
2
Note 2: Multiplier Gain Constant: K =
ELECTRICAL C
C
HARA TERISTICS The q denotes specifications which apply over the full operating tempera-
ture range, otherwise specifications are at T
A
= 25?/SPAN>C. Maximum operating voltage (V
MAX
) = 25V, V
CC
= 18V, R
SET
= 15k to GND,
C
SET
= 1nF to GND, I
AC
= 100?/SPAN>A, I
SENSE
= 0V, CA
OUT
= 3.5V, VA
OUT
= 5V, OVP = 7.5V, no load on any outputs, unless otherwise noted.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Current Amplifier
Current Amp Short-Circuit Current
CA
OUT
= 0V
q
5
14
30
mA
Input Range, I
SENSE
, M
OUT
(Linear Operation)
q
0.3
1
V
Reference
Reference Output Voltage
I
REF
= 0mA, T
A
= 25癈
7.39
7.50
7.60
V
V
REF
Load Regulation
5mA < I
REF
< 0mA
5
mV
V
REF
Line Regulation
11.5V < V
CC
< V
MAX
q
20
5
20
mV
V
REF
Short-Circuit Current
V
REF
= 0V
q
12
28
50
mA
V
REF
Worst Case
Load, Line, Temperature
q
7.32
7.5
7.68
V
Current Limit
PK
LIM
Offset Voltage
q
15
15
mV
PK
LIM
Input Current
PK
LIM
= 0.1V
q
50
100
礎
PK
LIM
to GTDR Propagation Delay
PK
LIM
Falling from 50mV to 50mV
400
ns
Multiplier
Multiplier Output Current
I
AC
= 100礎, R
SET
= 15k
35
礎
Multiplier Output Current Offset
R
AC
= 1M from I
AC
to GND
q
0.05
0.5
礎
Multiplier Maximum Output Current
I
AC
= 450礎, R
SET
= 15k, VA
OUT
= 7V, M
OUT
= 0V
q
286
260
235
礎
Multiplier Gain Constant (Note 2)
0.035
V
2
I
AC
Input Resistance
I
AC
from 50礎 to 1mA
15
32
50
k&
Oscillator
Oscillator Frequency
R
SET
= 15k, C
SET
= 1000pF
q
85
100
115
kHz
R
SET
= 15k, C
SET
= 1500pF
q
58
68
78
kHz
C
SET
Ramp Peak-to-Peak Amplitude
4.35
4.7
5.0
V
C
SET
Ramp Valley Voltage
1.25
1.4
1.55
V
Synchronization Pulse Threshold on EN/SYNC Pin
Pulse Low = 3.5V, High = 7V, Width > 200ns
4.5
5.6
6.5
V
Synchronization Frequency Range
R
SET
= 15k, C
SET
= 1000pF
q
1.2
1.6
f
NOM
Overvoltage Comparator
Comparator Trip Voltage Ratio (V
TRIP
/V
REF
)
q
1.04
1.05
1.06
Hysteresis
0.35
V
OVP Bias Current
OVP = 7.5V
q
50
250
nA
OVP Propagation Delay
100
ns
Gate Driver
Max GTDR Output Voltage
0mA Load, 18V < V
CC
q
12
15
17.5
V
GTDR Output High
200mA Load, 11.5V d V
CC
d 15V
q V
CC
3.0
V
GTDR Output Low (Device Unpowered)
V
CC
= 0V, 50mA Load (Sinking)
q
0.9
1.5
V
GTDR Output Low (Device Active)
200mA Load (Sinking)
q
0.5
1
V
10mA Load
q
0.2
0.4
V
Peak GTDR Current
10nF from GTDR to GND
2
A
GTDR Rise and Fall Time
1nF from GTDR to GND
25
ns
GTDR Max Duty Cycle
90
96
%
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