TYPICAL PERFORMAN" />
參數(shù)資料
型號: LT1055CN8
廠商: Linear Technology
文件頁數(shù): 13/16頁
文件大?。?/td> 0K
描述: IC PREC OP-AMP JFET HI-SPD 8-DIP
標(biāo)準(zhǔn)包裝: 50
放大器類型: J-FET
電路數(shù): 1
轉(zhuǎn)換速率: 12 V/µs
增益帶寬積: 4.5MHz
電流 - 輸入偏壓: 30pA
電壓 - 輸入偏移: 120µV
電流 - 電源: 2.8mA
電壓 - 電源,單路/雙路(±): ±5 V ~ 18 V
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
6
LT1055/LT1056
10556fc
TYPICAL PERFORMANCE CHARACTERISTICS
U
W
0.1Hz to 10Hz Noise
Warm-Up Drift
Distribution of Offset Voltage Drift
with Temperature (H Package)*
Long Term Drift of
Representative Units
TIME (SECONDS)
0
NOISE
VOLTAGE
(1
V/DIVISION)
8
LT1055/56 GO7
2
4
6
10
LT1056
LT1055
RMS
NOISE
VOLTAGE
DENSITY
(nV/
Hz)
FREQUENCY (Hz)
1
100
30
300
LT1055/56 G09
30
10
3
10
100
300
1000
LT1056
1/f CORNER = 28HZ
LT1055
1/f CORNER
= 20HZ
VS = ±15V
TA = 25°C
Voltage Noise vs Frequency
Noise vs Chip Temperature
CHIP TEMPERATURE (
°C)
20
1
2
3
5
7
10
20
30
50
70
100
40
LT1055/56 G08
0.1Hz
TO
10Hz
PEAK-TO-PEAK
NOISE
(
V/
P-P
)
10
80
30
50
60
70
f0 = 10kHz
f0 = 1kHz
PEAK-TO-PEAK
NOISE
RMS
NOISE
VOLTAGE
DENSITY
(nV/
Hz)
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (
V/°C)
–10
0
BATTERY
VOLTAGE
(V)
20
60
80
100
140
–8
0
4
LT1055/56 G04
40
120
–2
8
10
–6 –4
26
*DISTRIBUTION IN THE PLASTIC (N8) PACKAGE
IS SIGNIFICANTLY WIDER.
VS = ±15V
634 UNITS TESTED
FROM THREE RUNS
50% TO
±1.5V/°C
TIME AFTER POWER ON (MINUTES)
0
CHANGE
IN
OFFSET
VOLTAGE
(
V)
60
80
100
4
LT1055/56 G05
40
20
0
1
2
3
5
VS = ±15V
TA = 25°C
LT1056CN8
LT1055CN8
LT1056 H PACKAGE
LT1055 H PACKAGE
TIME (MONTHS)
0
OFFSET
VOLTAGE
CHANGE
V)
50
–50
40
–40
30
–30
20
–20
10
–10
0
4
LT1055/56 GO6
1
2
3
5
VS = ±15V
TA = 25°C
LT1055/56 G02
COMMON MODE INPUT VOLTAGE (V)
–15
–120
INPUT
BIAS
CURRENT,
T
A
=
25
°C,
T
A
=
70
°C
(pA)
–80
–40
0
40
120
–10
–5
0
5
10
15
80
–1200
–800
– 400
0
400
1200
800
VS = ±15V
WARMED UP
TA = 125°C
TA = 25°C
TA = 70°C
A = POSITIVE INPUT CURRENT
B = NEGATIVE INPUT CURRENT
A
B
A
INPUT
BIAS
CURRENT,
T
A =
125
°
C
(pA)
Input Bias and Offset Currents
vs Temperature
AMBIENT TEMPERATURE (
°C)
0
INPUT
BIAS
AND
OFFSET
CURRENT
(pA)
100
300
1000
100
LT1055/56 G01
30
10
3
25
50
75
125
BIAS OR OFFSET CURRENTS
MAY BE POSITIVE OR NEGATIVE
BIAS CURRENT
OFFSET CURRENT
VS = ±15V
VCM = 0V
WARMED UP
Input Bias Current Over the
Common Mode Range
Distribution of Input Offset
Voltage (N8 Package)
INPUT OFFSET VOLTAGE (
V)
–800
NUMBER
OF
INPUTS
80
100
120
800
LT1055/56 G03
60
40
0
–400
0
400
20
160
140
–600
–200
200
600
VS = ±15V
TA = 25°C
550 UNITS
TESTED FROM
TWO RUNS
(LT1056)
50% YIELD
TO
±140V
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