
Liteon Semiconductor Corporation
LSP2200
3 PIN Microprocessor Reset Monitors
4/5
Rev1.1
Figure 2
Figure 3
Ensuring a Valid Reset Output: Down to VCC = 0
When VCC falls below 1V, the LSP2200 RESET
_____________
output no longer sinks current-it becomes an open circuit.
Therefore, high-impedance CMOS logic input connected to RESET
_____________
can drift to undetermined voltages. This
presents no problem in most applications since most MPU and other circuitry is inoperative with Vcc below 1V.
However, in applications where RESET
_____________
must be valid down to 0V, adding a pull-down resistor to RESET
_____________
causes
any stray leakage currents to flow to ground, holding RESET
_____________
low Figure 3. R1's value is not critical, 100k is large
enough not to load RESET
_____________
and small enough to pull RESET
_____________
to ground
Bi-directional Reset Pin Interface
The LSP2200 can interface with the P/C’s directional Reset Pin by connecting a 4.7K resister in series with
LSP2200’s RESET
_____________
pin and the P/C’s directional Reset Pin.
Figure 4
Benefits of Highly Accurate Reset Threshold
Most MPU supervisor ICs have reset threshold voltages between 5% and 10% below the value of nominal supply
voltages. This ensures a reset will not occur within 5% of the nominal supply, but will occur when the supply is 10%
below nominal.
When using ICs rated at only the nominal supply ±5%, this leaves a zone of uncertainty where the supply is between
5% and 10% low, and where the reset may or may not be asserted.
The LSP2200-4.63/3.08/2.32 use highly accurate circuitry to ensure that reset is asserted close to the 5% limit, and
long before the supply has declined to 10% below nominal.
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Reset Comparator Overdrive, VTH-Vcc