參數(shù)資料
型號(hào): LPC662
廠商: National Semiconductor Corporation
英文描述: Low Power CMOS Dual Operational Amplifier
中文描述: 低功耗CMOS雙路運(yùn)算放大器
文件頁(yè)數(shù): 4/16頁(yè)
文件大?。?/td> 585K
代理商: LPC662
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
= 25C.
Boldface
limits apply at the temperature extremes. V
+
= 5V, V
= 0V, V
CM
= 1.5V, V
O
= 2.5V and R
L
1M unless otherwise specified.
LPC662AM
LPC662AMJ/883
Limit
(Notes 4, 8)
0.07
0.04
LPC662AI
Limit
(Note 4)
LPC662I
Limit
(Note 4)
Parameter
Conditions
Typ
Units
Slew Rate
(Note 6)
0.11
0.07
0.05
0.05
0.03
V/μs
min
MHz
Deg
dB
dB
Gain-Bandwidth Product
Phase Margin
Gain Margin
Amp-to-Amp Isolation
Input Referred Voltage Noise
0.35
50
17
130
42
(Note 7)
F = 1 kHz
Input Referred Current Noise
F = 1 kHz
0.0002
Total Harmonic Distortion
F = 1 kHz, A
V
= 10, V
+
= 15V
R
L
= 100 k
, V
O
= 8 V
PP
0.01
%
Note 1:
Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts
can result in exceeding the maximum allowed junction temperature of 150C. Output currents in excess of
±
30 mA over long term may adversely affect reliability.
Note 2:
The maximum power dissipation is a function of T
J(max)
,
θ
JA
, and T
A
. The maximum allowable power dissipation of any ambient temperature is P
D
=(T
J(max)
T
A
)/
θ
JA
.
Note 3:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-
tended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Note 4:
Limits are guaranteed by testing or correlation.
Note 5:
V
+
= 15V, V
CM
= 7.5V and R
L
connected to 7.5V. For Sourcing tests, 7.5V
V
O
11.5V. For Sinking tests, 2.5V
V
O
7.5V.
Note 6:
V
+
= 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Note 7:
Input referred. V
+
= 15V and R
L
= 100 k
connected to V
+
/2. Each amp excited in turn with 1 kHz to produce V
O
= 13 V
PP
.
Note 8:
A military RETS electrical test specification is available on request. At the time of printing, the LPC662AMJ/883 RETS specification complied fully with the
boldface
limits in this column. The LPC662AMJ/883 may also be procured to a Standard Military Drawing specification.
Note 9:
For operating at elevated temperatures the device must be derated based on the thermal resistance
θ
JA
with P
D
= (T
J
T
A
)/
θ
JA
.
Note 10:
All numbers apply for packages soldered directly into a PC board.
Note 11:
Do not connect output to V
+
when V
+
is greater than 13V or reliability may be adversely affected.
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相關(guān)PDF資料
PDF描述
LPC662AIM Low Power CMOS Dual Operational Amplifier
LPC662AIN Low Power CMOS Dual Operational Amplifier
LPC662AMD Low Power CMOS Dual Operational Amplifier
LPC662IM Low Power CMOS Dual Operational Amplifier
LPC662IN Low Power CMOS Dual Operational Amplifier
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