參數(shù)資料
型號: LPC3230FET296/01,5
廠商: NXP Semiconductors
文件頁數(shù): 56/57頁
文件大?。?/td> 0K
描述: IC ARM9 MCU 256K 296-TFBGA
標(biāo)準(zhǔn)包裝: 126
系列: LPC3200
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 266MHz
連通性: EBI/EMI,I²C,IrDA,Microwire,SPI,SSI,SSP,UART/USART,USB OTG
外圍設(shè)備: DMA,I²S,LCD,電機控制 PWM,PWM,WDT
輸入/輸出數(shù): 51
程序存儲器類型: ROMless
RAM 容量: 256K x 8
電壓 - 電源 (Vcc/Vdd): 0.9 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 3x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 296-TFBGA
包裝: 托盤
其它名稱: 568-4964
935290764551
LPC3220_30_40_50
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 20 October 2011
8 of 79
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
H16 HIGHCORE/LCDVD[17][1]
H17 JTAG_NTRST
H18 JTAG_RTCK
Row J
J1
EMC_A[20]/P1[20]
J2
EMC_A[21]/P1[21]
J3
EMC_A[22]/P1[22]
J4
EMC_A[23]/P1[23]
J5
VDD_IOC
J6
VDD_EMC
J7
VDD_CORE
J12
VDD_CORE
J13
VDD_IOA
J14
U3_RX/GPI_18
J15
JTAG_TDO
J16
JTAG_TDI
J17
U3_TX
J18
U2_HCTS/U3_CTS/GPI_16
Row K
K1
EMC_A[19]/P1[19]
K2
EMC_A[18]/P1[18]
K3
EMC_A[16]/P1[16]
K4
EMC_A[17]/P1[17]
K5
VSS_EMC
K6
VDD_EMC
K7
VDD_EMC
K12 VSS_CORE
K13 VSS_IOA
K14 VDD_RTC
K15 U1_RX/CAP1[0]/GPI_15
K16 U1_TX
K17 U2_TX/U3_DTR
K18 U2_RX/U3_DSR/GPI_17
Row L
L1
EMC_A[15]/P1[15]
L2
EMC_CKE1
L3
EMC_A[0]/P1[0]
L4
EMC_A[1]/P1[1]
L5
VSS_EMC
L6
VDD_EMC
L7
VSS_CORE
L12
VDD_COREFXD
L13
VDD_RTCCORE
L14
VSS_RTCCORE
L15
L16
P0[5]/I2S0TX_SDA/LCDVD[7][1]
L17
P0[6]/I2S0TX_CLK/
LCDVD[12][1]
L18
P0[7]/I2S0TX_WS/LCDVD[13][1]
Row M
M1
EMC_A[2]/P1[2]
M2
EMC_A[3]/P1[3]
M3
EMC_A[4]/P1[4]
M4
EMC_A[8]/P1[8]
M5
VSS_EMC
M6
VDD_EMC
M7
VDD_CORE
M8
VDD_EMC
M9
VSS_CORE
M10 VSS_CORE
M11 VDD_CORE
M12 VSS_CORE
M13 VDD_COREFXD
M14 RESET
M15 ONSW
M16 GPO_23/U2_HRTS/U3_RTS
M17 P0[2]/I2S0RX_SDA/
M18 P0[3]/I2S0RX_CLK/LCDVD[5][1]
Row N
N1
EMC_A[5]/P1[5]
N2
EMC_A[6]/P1[6]
N3
EMC_A[7/P1[7]
N4
EMC_A[12]/P1[12]
N5
VSS_EMC
N6
VSS_EMC
N7
VDD_EMC
N8
VDD_EMC
N9
VDD_EMC
N10 VDD_EMC
N11 VDD_EMC
N12 VDD_AD
N13 VDD_AD
N14 VDD_FUSE
N15 VDD_RTCOSC
N16 GPI_5/U3_DCD
N17 GPI_28/U3_RI
N18 GPO_17
Row P
P1
EMC_A[9]/P1[9]
P2
EMC_A[10]/P1[10]
P3
EMC_A[11]/P1[11]
P4
EMC_DQM[1]
P5
EMC_DQM[3]
P6
VSS_EMC
Table 3.
Pin allocation table (TFBGA296)
Pin
Symbol
Pin
Symbol
Pin
Symbol
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