參數(shù)資料
型號: LPC1343FHN33,518
廠商: NXP Semiconductors
文件頁數(shù): 57/74頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 32KB FLASH 32HVQFN
應(yīng)用說明: LPC111x,13xx Appl Note
標準包裝: 4,000
系列: LPC13xx
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 72MHz
連通性: I²C,Microwire,SPI,SSI,SSP,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 28
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 32-VQFN 裸露焊盤
包裝: 帶卷 (TR)
其它名稱: LPC1343FHN33518
LPC1311_13_42_43
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 6 June 2012
60 of 74
NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
In slave mode the input clock signal should be coupled by means of a capacitor of 100 pF
(Figure 34), with an amplitude between 200 mV(RMS) and 1000 mV(RMS). This
corresponds to a square wave signal with a signal swing of between 280 mV and 1.4 V.
The XTALOUT pin in this configuration can be left unconnected.
External components and models used in oscillation mode are shown in Figure 35 and in
Table 21 and Table 22. Since the feedback resistance is integrated on chip, only a crystal
and the capacitances CX1 and CX2 need to be connected externally in case of
fundamental mode oscillation (the fundamental frequency is represented by L, CL and
RS). Capacitance CP in Figure 35 represents the parallel package capacitance and should
not be larger than 7 pF. Parameters FOSC, CL, RS and CP are supplied by the crystal
manufacturer.
Fig 34. Slave mode operation of the on-chip oscillator
Fig 35. Oscillator modes and models: oscillation mode of operation and external crystal
model used for CX1/CX2 evaluation
LPC1xxx
XTALIN
Ci
100 pF
Cg
002aae788
002aaf424
LPC1xxx
XTALIN
XTALOUT
CX2
CX1
XTAL
=
CL
CP
RS
L
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