參數(shù)資料
型號: LP3996SDX-0833
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Dual Linear Regulator with 300mA and 150mA Outputs and Power-On-Reset
中文描述: DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, DSO10
封裝: 3 X 3 MM, LEAD FREE, LLP-10
文件頁數(shù): 2/16頁
文件大小: 871K
代理商: LP3996SDX-0833
Functional Block Diagram
20145806
Pin Descriptions
LLP-10 Package
Pin No
1
Symbol
V
IN
Name and Function
Voltage Supply Input. Connect a 1μF capacitor between this
pin and GND.
Enable Input to Regulator 1. Active high input.
High = On. Low = OFF.
Enable Input to Regulator 2. Active high input.
High = On. Low = OFF.
Internal Voltage Reference Bypass. Connect a 10nF capacitor
from this pin to GND to reduce output noise and improve line
transient and PSRR.
This pin may be left open.
Set Delay Input. Connect a capacitor between this pin and
GND to set the POR delay time. If left open, there will be no
delay.
Common Ground pin. Connect externally to exposed pad.
No Connection. Do not connect to any other pin.
Power-On Reset Output. Open drain output. Active low
indicates under-voltage output on Regulator 2. A pull-up
resistor is required for correct operation.
Output of Regulator 2. 300mA maximum current output.
Connect a 1μF capacitor between this pin and GND.
Output of Regulator 1. 150mA maximum current output.
Connect a 1μF capacitor between this pin and GND.
Common Ground. Connect to Pin 6.
2
EN1
3
EN2
4
C
BYP
5
SET
6
7
8
GND
N/C
POR
9
V
OUT2
10
V
OUT1
Pad
GND
L
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2
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