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Electrical Characteristics
(Notes 2, 10)
Limits in standard typeface are for T
J
= 25°C. Limits in
boldface
type apply over the operating ambient temperature range (-30°C
< T
A
< +85°C). Unless otherwise noted, specifications apply to the LP3952 Block Diagram with: V
DD1
= V
DD2
= 3.6V, V
DDIO
= 2.8V,
C
VDD
= C
VDDIO
= 100 nF, C
OUT
= C
IN
= 10 μ
F, C
VDDA
= 1 μ
F, C
REF
= 100 nF, L
1
= 4.7 μ
H, R
RGB
= 5.6 k
Ω
and R
RT
= 82 k
Ω (
Note
11).
Symbol
Parameter
Condition
I
VDD
Standby supply current
(V
DD1
+ V
DD2
)
SCL=H, SDA = H
No-boost supply current
(V
DD1
+ V
DD2
)
EN_BOOST(bit) = L
SCL = H, SDA = H
Audio sync and LEDs OFF
No-load supply current
(V
DD1
+ V
DD2
)
EN_BOOST (bit) = H
SCL = H, SDA = H
Audio sync and LEDs OFF
Autoload OFF
RGB drivers
(V
DD1
+ V
DD2
)
SW mode
I
VDD
Audio synchronization
(V
DD1
+ V
DD2
)
V
DD1,2
= 2.8V
V
DD1,2
= 3.6V
I
VDDIO
V
DDIO
Standby Supply
current
SCL = H, SDA = H
I
EXT_LDO
External LDO output
current
(V
DD1
, V
DD2
, V
DDA
)
V
DDA
Output voltage of internal
LDO for analog parts
Min
Typ
1
Max
8
Units
μ
A
NSTBY (bit) = L, NRST (pin) = H
NSTBY (bit) = H,
450
μ
A
NSTBY (bit) = H,
1
mA
CC mode at R1, G1, B1 and R2, G2, B2 set to 15 mA
150
150
390
700
μ
A
Audio sync ON
μ
A
NSTBY (bit)=L
1
μ
A
7V tolerant application only
I
BOOST
= 300 mA
6.5
mA
(Note 12)
2.72
-3
2.80
2.88
+3
V
%
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2:
All voltages are with respect to the potential at the GND pins.
Note 3:
Battery/Charger voltage should be above 6V no more than 10% of the operational lifetime.
Note 4:
Voltage tolerance of LP3952 above 6.0V relies on fact that V
and V
(2.8V) are available (ON) at all conditions. If V
DD1
and V
DD2
are not available
(ON) at all conditions, National Semiconductor does not guarantee any parameters or reliability for this device.
Note 5:
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
J
=160°C (typ.) and disengages at
T
J
=140°C (typ.).
Note 6:
For detailed soldering specifications and information, please refer to National Semiconductor Application Note AN1412 : Micro SMDxt Wafer Level Chip
Scale Package
Note 7:
The Human body model is a 100 pF capacitor discharged through a 1.5 k
resistor into each pin.
Note 8:
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
A-MAX
) is dependent on the maximum operating junction temperature (T
= 125°C), the maximum power
dissipation of the device in the application (P
), and the junction-to ambient thermal resistance of the part/package in the application (
θ
JA
), as given by the
following equation: T
A-MAX
= T
J-MAX-OP
– (θ
JA
× P
D-MAX
).
Note 9:
Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 10:
Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 11:
Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
Note 12:
V
DDA
output is not recommended for external use.
5
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