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Absolute Maximum Ratings
(Notes 1,
2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V (SW, FB, R1–2, G1–2, B1–2)
(Notes 3, 4)
V
DD1
, V
DD2
, V
DDIO
, V
DDA
Voltage on ASE, AD1, AD2
0.3V to +7.2V
0.3V to +6.0V
0.3V to
V
DD1
+0.3V with 6.0V max
0.3V to V
DD_IO
+0.3V with 6.0V max
Voltage on Logic Pins
I (R1, G1, B1, R2, G2, B2)
(Note 5)
I (V
REF
)
Continuous Power Dissipation
(Note 6)
Junction Temperature (T
J-MAX
)
Storage Temperature Range
150 mA
10 μA
Internally Limited
125C
65C to +150C
Maximum Lead Temperature
(Reflow soldering, 3 times) (Note 7)
ESD Rating (Note 8)
Human Body Model:
Machine Model:
260C
2 kV
200V
Operating Ratings
(Notes 1, 2)
V (SW, FB, R1–2, G1–2, B1–2)
V
DD1
, V
DD2
, V
DDA
(Note 4)
V
DDIO
Voltage on ASE, AD1, AD2
Recommended Load Current
Junction Temperature (T
J
) Range
Ambient Temperature (T
A
) Range
(Note 9)
0V to 6.0V
2.7V to 2.9V
1.65V to V
DD1,2
V
0.1V to V
DD1
- 0.1V
0 mA to 300 mA
40C to +125C
40C to +85C
Thermal Properties
Junction-to-Ambient Thermal Resistance
(
θ
JA
), SLD32A Package (Note 10)
72C/W
Electrical Characteristics
(Notes 2, 11)
Limits in standard typeface are for T
J
= +25C. Limits in
boldface
type apply over the operating ambient temperature range
(40C
≤
T
A
≤
+85C). Unless otherwise noted, specifications apply to
Figure 1
with: V
DD1
= V
DD2
= V
DDA
= 2.8V, C
VDD1
=
C
VDD2
= C
VDDA
= C
VDDIO
= 100 nF, C
OUT
= C
IN
= 10 μF, C
VREF
= 100 nF, L
1
= 4.7 μH and f
BOOST
= 2.0 MHz (Note 12).
Symbol
Parameter
Condition
I
VDD
Standby Supply Current
(V
DD1
+ V
DD2
+ V
DDA
current)
SCK, SS, SI, NRST = H
No-Load Supply Current
(V
DD1
+ V
DD2
+ V
DDA
current, boost
off)
SCK, SS, SI, NRST = H
Full Load Supply Current
(V
DD1
+ V
DD2
+ V
DDA
current, boost
on)
(Note 13)
All Outputs Active
I
VDDIO
V
DDIO
Supply Current
1.0 MHz SCK Frequency
C
L
= 50 pF at SO Pin
I
VDDA
Audio Circuitry Supply Current
(Note 14)
V
REF
Reference Voltage(Note 15)
I
REF
≤
1.0 nA Only for Test
Purpose
Min
Typ
1
Max
5
Units
μA
NSTBY = L (register)
NSTBY = H (reg.)
EN_BOOST = L (reg.)
300
400
μA
NSTBY = H (reg.)
EN_BOOST = H (reg.)
SCK, SS, SI, NRST = H
850
μA
20
μA
INPUT_SEL = [10] (register)
550
μA
1.230
V
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2:
All voltages are with respect to the potential at the GND pins (GND1–3, GND_BOOST, GND_RGB, GNDA).
Note 3:
Battery/Charger voltage should be above 6.0V no more than 10% of the operational lifetime.
Note 4:
Voltage tolerance of LP3950 above 6.0V relies on fact that V
DD1
, V
DD2
and V
DDA
(2.8V) are available (ON) at all conditions. If V
DD1
, V
DD2
and V
DDA
are
not available (ON) at all conditions, National Semiconductor does not guarantee any parameters or reliability for this device. Also, V
DD1
, V
DD2
and V
DDA
must be
at the same electric potential.
Note 5:
The total load current of the boost converter should be limited to 300 mA.
Note 6:
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
J
= 160C (typ.) and disengages at T
J
=
140C (typ.).
Note 7:
For detailed package and soldering specifications and information, please refer to National Semiconductor Application Note 1125: Laminate CSP/FBGA.
Note 8:
The Human body model is a 100 pF capacitor discharged through a 1.5 k
resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
L
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