參數資料
型號: LP3923TLX-VB
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PBGA30
封裝: 3 X 2.50 MM, MICRO SMD-30
文件頁數: 17/32頁
文件大?。?/td> 1718K
代理商: LP3923TLX-VB
LDO Information
OPERATIONAL INFORMATION
The LP3923 has eight LDOs of which 4 are enabled by default
and powered up during the power up sequence, LDOs 1, 2,
3 and 7 are powered up during the power up sequence. LDOs
4, 5, and 6 are separately externally enabled and will follow
LDO3 in start up if their respective enable pin is pulled high.
LDO1, LDO2, LDO7 and LDO8 can be enabled/disabled via
the Serial Interface
LDO3 must remain in regulation otherwise the device will
power down.
The LILO-type LDO is optimized for low output voltage and
for good dynamic performance to supply different fast charg-
ing (digital) pads.
INPUT VOLTAGES
There are two input voltage pins used to power the eight LDOs
on the LP3923. V
IN1 is the supply for LDO1 and LDO2. VIN2
is the supply for LDO3, LDO4, LDO5, LDO6, LDO7, and
LDO8.
EXTERNAL CAPACITORS
The Low Drop Out Linear Voltage regulators on the LP3923
require external capacitors to ensure stable outputs. The
LDOs on the LP3923 are specifically designed to use small
surface mount ceramic capacitors which require minimum
board space. These capacitors must be correctly selected for
good performance.
INPUT CAPACITOR
Input capacitors are required for correct operation. It is rec-
ommended that a 10 F capacitor be connected between
each of the voltage input pins and ground (this capacitance
value may be increased without limit).
This capacitor must be located a distance of not more than 1
cm from the input pin and returned to a clean analogue
ground. A ceramic capacitor is recommended although a
good quality tantalum or film capacitor may be used at the
input.
Important:
Tantalum capacitors can suffer catastrophic fail-
ures due to surge current when connected to a low-
impedance source of power (like a battery or a very large
capacitor). If a tantalum capacitor is used at the input, it must
be guaranteed by the manufacturer to have a surge current
rating sufficient for the application.
There are no requirements for the ESR (Equivalent Series
Resistance) on the input capacitor, but tolerance and tem-
perature coefficient must be considered when selecting the
capacitor to ensure the capacitance will remain within its op-
erational range over the entire operating temperature range
and conditions.
OUTPUT CAPACITOR
Correct selection of the output capacitor is critical to ensure
stable operation in the intended application.
The output capacitor must meet all the requirements specified
in the recommended capacitor table over all conditions in the
application. These conditions include DC-bias, frequency and
temperature. Unstable operation will result if the capacitance
drops below the minimum specified value.
The LP3923 is designed specifically to work with very small
ceramic output capacitors. The LDOs on the LP3923 are
specifically designed to be used with X7R and X5R type ca-
pacitors. With these capacitors, selection of the capacitor for
the application is dependant on the range of operating con-
ditions and temperature range for that application. (See sec-
tion on Capacitor Characteristics).
It is also recommended that the output capacitor be placed
within 1 cm from the output pin and returned to a clean ground
line.
CAPACITOR CHARACTERISTICS
The LDOs on the LP3923 are designed to work with ceramic
capacitors on the input and output to take advantage of the
benefits they offer. For capacitance values around 1F, ce-
ramic capacitors give the circuit designer the best design
options in terms of low cost and minimal area.
For both input and output capacitors careful interpretation of
the capacitor specification is required to ensure correct device
operation. The capacitor value can change greatly dependant
on the conditions of operation and capacitor type.
In particular, to ensure stability, the output capacitor selection
should take account of all the capacitor parameters to ensure
that the specification is met within the application. Capaci-
tance value can vary with DC bias conditions as well as
temperature and frequency of operation. Capacitor values will
also show some decrease over time due to aging. The ca-
pacitor parameters are also dependant on the particular case
size with smaller sizes giving poorer performance figures in
general.
As an example shows a typical graph showing a comparison
of capacitor case sizes in a Capacitance vs. DC Bias plot. As
shown in the graph, as a result of the DC Bias condition the
capacitance value may drop below the minimum capacitance
value given in the recommended capacitor table (0.7 F in
this case). Note that the graph shows the capacitance out of
spec for the 0402 case size capacitor at higher bias voltages.
It is therefore recommended that the capacitor manufacturers'
specifications for the nominal value capacitor are consulted
for all conditions as some capacitor sizes (e.g. 0402) may not
be suitable in the actual application.
30058616
FIGURE 2. Graph Showing A Typical Variation in
Capacitance vs DC Bias
Ceramic capacitors have the lowest ESR values, thus making
them best for eliminating high frequency noise. The ESR of a
typical 1 F ceramic capacitor is in the range of 10 m
to
40 m
, and also meets the ESR requirement for stability.
The temperature performance of ceramic capacitors varies by
type. Capacitor type X7R is specified with a tolerance of ±15%
www.national.com
24
LP3923
相關PDF資料
PDF描述
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