參數(shù)資料
型號(hào)： LP3918TL-L
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 電源管理
英文描述： Battery Charge Management and Regulator Unit
中文描述： 1-CHANNEL POWER SUPPLY SUPPORT CKT, PBGA25
封裝： 2.50 X 2.50 MM, MICRO, SMD-25
文件頁(yè)數(shù)： 18/30頁(yè)
文件大小： 1292K
代理商： LP3918TL-L
No-Load Stability
The LDO's on the LP3918 will remain stable in regulation with
no external load.
TABLE 20. LDO Output Capacitors Recommended Specification
Symbol
Parameter
Capacitor Type
Typ
Limit
Units
Min
Max
C
o(LDO1)
Capacitance
X5R. X74
1.0
0.7
2.2
F
C
o(LDO2)
Capacitance
X5R. X74
1.0
0.7
2.2
F
C
o(LDO3)
Capacitance
X5R. X74
1.0
0.7
2.2
F
C
o(LDO4)
Capacitance
X5R. X74
1.0
0.7
2.2
F
C
o(LDO5)
Capacitance
X5R. X74
1.0
0.7
2.2
F
C
o(LDO6)
Capacitance
X5R. X74
1.0
0.7
2.2
F
C
o(LDO7)
Capacitance
X5R. X74
1.0
0.7
2.2
F
Note: The capacitor tolerance should be 30% or better over
the full temperature range. X7R or X5R capacitors should be
used. These specifications are given to ensure that the ca-
pacitance remains within these values over all conditions
within the application. See Capacitor Characteristics section
in Application Information.
Thermal Shutdown
The LP3918 has internal limiting for high on-chip tempera-
tures caused by high power dissipation etc. This Thermal
Shutdown, TSD, function monitors the temperature with re-
spect to a threshold and results in a device power-down.
If the threshold of +160°C has been exceeded then the device
will power down. Recovery from this TSD event can only be
initiated after the chip has cooled below +115°C. This device
recovery is controlled by the APU_TSD_EN bit (bit 1) in con-
trol register MISC, 8h'1C. See Table 22 If the APU_TSD_EN
is set low then the device will shutdown requiring a new start
up event initiated by PWR_ON, HF_PWR, or CHG_IN. If
APU_TSD_EN is set high then the device will power up au-
tomatically when the shutdown condition clears. In this case
the control register settings are preserved for the device
restart.
The threshold temperature for the device to clear this TSD
event is 115°C. This threshold applies for any start up thus
the device temperature must be below this threshold to allow
a start up event to initiate power up.
Further Register Information
STATUS REGISTER READ ONLY
TABLE 21. Register Address 8h'0C: Status
BIT
NAME
FUNCTION (if bit = '1')
7
PWR_ON
_TRIG
PMU start up is initiated by
PWR_ON.
6
HF_PWR
_TRIG
PMU start up is initiated by
HF_PWR.
5
CHG_IN
_TRIG
PMU start up is initiated by
CHG_IN.
Bits <4..0> are not used.
MISC CONTROL REGISTER
TABLE 22. Register Address 8h'1C: Misc
BIT
NAME
FUNCTION (if bit = '1')
1
APU_TSD
_EN
1b' 0: Device will shutdown
completely if thermal shutdown
occurs. Requires a new start up
event to restart the PMU.
1b'1: Device will start up
automatically after thermal
shutdown condition is removed.
(Device tries to keep its internal
state.)
0
PWR_HOLD
DELAY
1b'0: If PWR_HOLD is low for 35ms
the device will shutdown. (Default)
1b'1: If PWR_HOLD is low for
350ms the device will shutdown.
Bits <7..2> are not used.
I2C Compatible Serial Bus Interface
INTERFACE BUS OVERVIEW
The I2C compatible synchronous serial interface provides ac-
cess to the programmable functions and registers on the
device.
This protocol uses a two-wire interface for bi-directional com-
munications between the IC’s connected to the bus. The two
interface lines are the Serial Data Line (SDA), and the Serial
Clock Line (SCL). These lines should be connected to a pos-
itive supply, via a pull-up resistor of 1.5K
, and remain HIGH
even when the bus is idle.
Every device on the bus is assigned a unique address and
acts as either a Master or a Slave depending on whether it
generates or receives the serial clock (SCL).
DATA TRANSACTIONS
One data bit is transferred during each clock pulse. Data is
sampled during the high state of the serial clock (SCL). Con-
sequently, throughout the clock’s high period, the data should
remain stable. Any changes on the SDA line during the high
state of the SCL and in the middle of a transaction, aborts the
current transaction. New data should be sent during the low
SCL state. This protocol permits a single data line to transfer
both command/control information and data using the syn-
chronous serial clock.
25
www.national.com
LP3918
相關(guān)PDF資料
PDF描述
LP3918TLX-L Battery Charge Management and Regulator Unit
LPB-5015 PULSE TRANSFORMER FOR GENERAL PURPOSE APPLICATION(S)
LPC870-F2G2-1 SINGLE COLOR LED, PURE GREEN
LPD3015-682MTD 2 ELEMENT, 6.8 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD
LPD3015-682MSD 2 ELEMENT, 6.8 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LP3918TLX 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述:
LP3918TLX/NOPB 功能描述:電池管理 RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel
LP3918TLX-A 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Battery Charge Management and Regulator Unit
LP3918TLX-A/NOPB 功能描述:電池管理 RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel
LP3918TLX-L 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Battery Charge Management and Regulator Unit
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*