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參數(shù)資料
| 型號： | LMX2411 |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 基帶處理器 |
| 英文描述： | Baseband Processor for Radio Communications |
| 中文描述： | 基帶處理器的無線電通信 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 162K |
| 代理商： | LMX2411 |
Application Information
THE TRANSMIT DAC
The transmit DAC uses a voltage mode output. By nature,
the output impedance of voltage mode DACs is relatively
high. To conserve current, the output impedance of the
LMX2411 was designed at 3 k
X
. This results in very low
current consumption in the resistor strings, but also results
in low drive capability. The user should be aware that in
order to achieve the minimum settling time, the maximum
capacitive load for the DACs should be no more than 3 pF.
To achieve a settling time suitable for DECT bit rates, the
maximum capacitive load the transmit DAC should see is
about 15 pF.
VCO modulation of a TDD and/or TDMA radio requires
some compromise to the VCO phase-locked loop circuitry.
A common practice is to use a very narrow PLL loop band-
width to avoid distorting the modulating signal. However,
this is not an effective technique when fast switching is re-
quired. Rapid switching times demand a wide loop band-
width. A typical loop bandwidth of 20 kHz will distort the
lower frequency components of the DECT modulating sig-
nal.
TL/W/11911–11
FIGURE 1. Illustration of a Circuit That Could
Be Used to Modulate an Open Loop VCO.
An alternate modulation technique is to open the loop by
powering down the PLL, which in the LMX2320 results in a
TRI-STATE
é
at the charge pump output. For short bursts,
the loop filter will not lose the charge, and the center fre-
quency will not drift. Figure 1 shows a sample circuit for
modulating on an open loop. Note that the VCO requires
only one tuning port for both locking and modulation. R1
and R2 will vary depending on which wideband VCO is
used. The proper equation to be used in determining R1 and
R2 is below:
V
DAC
*
R2
R1
a
R2
*
K
V
e
576 kHz
(1)
In this case, K
V
is the VCO sensitivity, expressed in MHz/V,
and V
DAC
is nominally 1V. Generally, R1 will be on the order
of 50 k
X
to 250 k
X
, and the ratio of R1 to R2 will vary from
30:1 to 50:1 for wideband VCOs, and will be smaller for
narrowband VCOs. Also, the 576 kHz is the peak to peak
frequency deviation for DECT, which means the peak is half
of that, or 288 kHz.
The Gaussian filter ROM DAC uses a three bit memory to
represent the filter’s pulse response. The result is an effec-
tive 3 bit time delay from input of the first bit to when that bit
is actually output from the filter. When using the LMX2411
transmit section, the bits must be sent two bit times before
they must be seen at the antenna to account for this small
delay in the ROM DAC. There is also a half bit sample delay
to allow the 2411 to sample the data near the center of the
bit. Also, the end of the information data stream must be
padded by 3 bits to push the last data bit through the filter.
Finally, it shouId be noted that after the Tx PD pin goes low,
the ROM filter output will be at the mid-band voltage until
the first edge of Tx Data, which is used for synchronizing the
internal clock with the transmitted data.
The three bit address of the ROM filter is preset to an alter-
nating pattern when Tx PD is HIGH. The value of the alter-
nating pattern depends on the polarity of Tx Data when Tx
PD is HIGH. If Tx Data is HIGH (handset), the three bit
memory is set to 101, and if Tx Data is LOW (base station),
the three bit memory is set to 010. This allows for either the
base station or handset preamble.
When beginning the burst for open loop modulation, the Tx
Data line shouId be held constant at the poIarity opposite to
the first bit to be transmitted. For handsets, this means Tx
Data should be HIGH; for base stations, this means Tx Data
should be LOW. When Tx PD goes LOW, the output of the
ROM filter will stay at mid-band (DAC code ‘‘10000000’’)
until the first edge on Tx Data. This allows the DAC average
output voltage to be added to the PLL loop voltage while the
center frequency is being acquired, thus avoiding a frequen-
cy offset problem.
THE DC COMPENSATION LOOP
The analog DC compensation loop is designed to provide a
simple yet accurate way to track and correct the effects of
DC drift due to center frequency drift. This loop will provide
accurate representations of the center voltage of the re-
ceived signal. However, on initial startup (i.e., full Hold ca-
pacitor discharge), the average DC value will not be recov-
ered until the end of the DECT synchronization word for the
first burst. The second and subsequent bursts should have
the DC value recovered within the first few bits of the syn-
chronization field. This means that in normal situations, the
receiver will miss the first burst due to lack of synchroniza-
tion (i.e., too many errors in the CRC).
It should be noted, however, that because the droop in the
sample and hold circuit is small, a normal DECT conversa-
tion can take place without degradation. The Typical Per-
formance Characteristics plots should be consulted for ex-
pected droop values and DC compensation loop perform-
ance.
Some burst mode controllers support a digital DC compen-
sation method (i.e., Sierra SC14400). In this method, the
duty cycle of the incoming signal is monitored by a counter,
and an update value is sent to a DAC that sets the threshold
value for the comparator. In this case, the LMX2411 should
have the pin for S-Field pulled HIGH, and the output of the
BMC’s DAC should be input directly to the comparator’s
threshold input (pin 2).
8
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2411M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RF/Baseband Circuit |
| LMX2411MX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RF/Baseband Circuit |
| LMX2430 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| LMX2430EVAL | 功能描述:EVALUATION BOARD FOR LMX2430 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| LMX2430EVAL/NOPB | 功能描述:時鐘和定時器開發(fā)工具 LMX2430 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
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