參數(shù)資料
型號(hào): LMX2330UTM
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 2500 MHz, PDSO20
封裝: 0.173 INCH, PLASTIC, TSSOP-20
文件頁(yè)數(shù): 27/42頁(yè)
文件大?。?/td> 3318K
代理商: LMX2330UTM
Test Setups
(Continued)
LMX233xU OSC
in
Sensitivity Test Setup
10136641
The block diagram above illustrates the setup required to
measure the LMX233xU device’s OSC
buffer sensitivity
level. The same setup is used for a LMX2330TMEB Evalu-
ation Board. This setup is similar to the f
sensitivity setup
except that the signal generator is now connected to the
OSC
pin and both f
pins are tied to V
. The 51
shunt
resistor matches the OSC
input to the signal generator. The
R counter is typically set to 1000, i.e. RF R_CNTR Word =
1000 or IF R_CNTR Word = 1000. The reference divider
output is routed to the F
o
LD pin by selecting the
RF PLL R
Divider Output
word (F
o
LD Word = 2 or 10) or the
IF PLL R
Divider Output
word (F
o
LD Word = 1 or 9) in Code Loader.
Similarly, a Universal Counter is connected to the F
LD pin
and is tied to the 10 MHz reference output from the signal
generator. The output of the reference divider is monitored
and should be equal to OSC
in
/ RF R_CNTR or OSC
in
/ IF
R_CNTR.
Again, V
is swept from 2.7V to 5.5V. The OSC
input
frequency and voltage level are then swept with the signal
generator. The measurements are repeated at different tem-
peratures, namely T
= -40C, +25C, and +85C. Sensitivity
is reached when the frequency error of the divided input
signal is greater than or equal to 1 Hz.
L
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27
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LMX2330UTMX 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications
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