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參數(shù)資料
| 型號： | LMH6502MA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Wideband, Low Power, Linear-in-dB Variable Gain Amplifier |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO14 |
| 封裝： | SOIC-14 |
| 文件頁數(shù)： | 15/19頁 |
| 文件大?。?/td> | 941K |
| 代理商： | LMH6502MA |
Application Information
(Continued)
V
IN
= 0V, the input referred V
OS
term shows up as a small
square wave riding a DC value. Adjust R
10
to null the V
OS
square wave term to zero. After adjusting the input-referred
offset, adjust R
14
(with V
IN
= 0, V
G
= 0) until V
OUT
is zero.
Finally, for inverting applications V
IN
may be applied to pin 6
and the offset adjustment to pin 3. These steps will minimize
the output offset voltage. However, since the offset term itself
varies with the gain setting, the correction is not perfect and
some residual output offset will remain at in-between V
’s.
Also, this offset trim does not improve output offset tempera-
ture coefficient.
GAIN ACCURACY
Defined as the actual gain compared against the theoretical
gain at a certain V
G
(results expressed in dB).
Theoretical gain is given by:
(4)
Where K = 1.72 (nominal) & V
C
= 90mV
@
room tempera-
ture.
For a V
range, the value specified in the tables represents
the worst case accuracy over the entire range. The "Typical"
value would be the worst case difference between the "Typi-
cal Gain" and the "Theoretical gain". The "Max" value would
be the worst case difference between the max/min gain limit
and the "Theoretical gain".
GAIN MATCHING
Defined as the limit on gain variation at a certain V
G
(ex-
pressed in dB). Specified as "Max" only (no "Typical"). For a
V
G
range, the value specified represents the worst case
matching over the entire range. The "Max" value would be
the worst case difference between the max/min gain limit
and the typical gain.
NOISE
Figure 3
describes the LMH6502’s output-referred spot
noise density as a function of frequency with A
= 10V/V.
The plot includes all the noise contributing terms. However,
with both inputs terminated in 50
, the input noise contribu-
tion is minimal.AtA
= 10V/V, the LMH6502 has a typical
input-referred spot noise density (e
in
) of 7.7nV/
band. For applications extending well into the flat-band re-
gion, the input RMS voltage noise can be determined from
the following single-pole model:
flat-
(5)
CIRCUIT LAYOUT CONSIDERATIONS & EVALUATION
BOARD
A good high frequency PCB layout including ground plane
construction and power supply bypassing close to the pack-
age are critical to achieving full performance. The amplifier is
sensitive to stray capacitance to ground at the I
input (pin
12); keep node trace area small. Shunt capacitance across
the feedback resistor should not be used to compensate for
this effect. For best performance at low maximum gains
(A
<
10) +R
and -R
connections should be treated in
a similar fashion. Capacitance to ground should be mini-
mized by removing the ground plane from under the body of
R
. Parasitic or load capacitance directly on the output (pin
10) degrades phase margin leading to frequency response
peaking.
The LMH6502 is fully stable when driving a 100
load. With
reduced load (e.g. 1k
) there is a possibility of instability at
very high frequencies beyond 400MHz especially with a
capacitive load. When the LMH6502 is connected to a light
load as such, it is recommended to add a snubber network to
the output (e.g. 100
and 39pF in series tied between the
LMH6502 output and ground). C
L
can also be isolated from
the output by placing a small resistor in series with the output
(pin 10).
Component parasitics also influence high frequency results.
Therefore it is recommended to use metal film resistors such
as RN55D or leadless components such as surface mount
devices. High profile sockets are not recommended.
20067743
FIGURE 2. Nulling the output offset voltage
20067710
FIGURE 3. Output Referred Voltage Noise vs.
Frequency
L
www.national.com
15
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| LMH6502MA/NOPB | 功能描述:特殊用途放大器 Wdbd, Lo Pwr, Linear -in-dB Var Gain Amp RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補(bǔ)償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
| LMH6502MAX | 功能描述:特殊用途放大器 RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補(bǔ)償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
| LMH6502MAX/NOPB | 功能描述:特殊用途放大器 RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補(bǔ)償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
| LMH6502MT | 功能描述:特殊用途放大器 RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補(bǔ)償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
| LMH6502MT/NOPB | 功能描述:特殊用途放大器 RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補(bǔ)償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
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