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Application Information
(Continued)
USING THE CURRENT SENSE OUTPUT
The CURRENT SENSE output (pin 8) has a sensitivity of
377 μA per ampere of output current. For optimal accuracy
and linearity of this signal, the value of voltage generating re-
sistor between pin 8 and ground should be chosen to limit
the maximum voltage developed at pin 8 to 5V, or less. The
maximum voltage compliance is 12V.
It should be noted that the recirculating currents (free wheel-
ing currents) are ignored by the current sense circuitry.
Therefore, only the currents in the upper sourcing outputs
are sensed.
USING THE THERMAL WARNING FLAG
The THERMALFLAG output (pin 9) is an open collector tran-
sistor. This permits a wired OR connection of thermal warn-
ing flag outputs from multiple LMD18200’s, and allows the
user to set the logic high level of the output signal swing to
match system requirements. This output typically drives the
interrupt input of a system controller. The interrupt service
routine would then be designed to take appropriate steps,
such as reducing load currents or initiating an orderly system
shutdown. The maximum voltage compliance on the flag pin
is 12V.
SUPPLY BYPASSING
During switching transitions the levels of fast current
changes experienced may cause troublesome voltage tran-
sients across system stray inductance.
It is normally necessary to bypass the supply rail with a high
quality capacitor(s) connected as close as possible to the V
S
Power Supply (Pin 6) and GROUND (Pin 7). A 1 μF
high-frequency ceramic capacitor is recommended. Care
should be taken to limit the transients on the supply pin be-
low the Absolute Maximum Rating of the device. When oper-
ating the chip at supply voltages above 40V a voltage sup-
pressor (transorb) such as P6KE62A is recommended from
supply to ground. Typically the ceramic capacitor can be
eliminated in the presence of the voltage suppressor. Note
that when driving high load currents a greater amount of sup-
ply bypass capacitance (in general at least 100 μF per Amp
of load current) is required to absorb the recirculating cur-
rents of the inductive loads.
CURRENT LIMITING
Current limiting protection circuitry has been incorporated
into the design of the LMD18200. With any power device it is
important to consider the effects of the substantial surge cur-
rents through the device that may occur as a result of
shorted loads. The protection circuitry monitors this increase
in current (the threshold is set to approximately 10 Amps)
and shuts off the power device as quickly as possible in the
event of an overload condition. In a typical motor driving ap-
plication the most common overload faults are caused by
shorted motor windings and locked rotors. Under these con-
ditions the inductance of the motor (as well as any series in-
ductance in the V
supply line) serves to reduce the mag-
nitude of a current surge to a safe level for the LMD18200.
Once the device is shut down, the control circuitry will peri-
odically try to turn the power device back on. This feature al-
lows the immediate return to normal operation in the event
that the fault condition has been removed. While the fault re-
mains however, the device will cycle in and out of thermal
shutdown. This can create voltage transients on the V
supply line and therefore proper supply bypassing tech-
niques are required.
The most severe condition for any power device is a direct,
hard-wired (“screwdriver”) long term short from an output to
ground. This condition can generate a surge of current
through the power device on the order of 15 Amps and re-
quire the die and package to dissipate up to 500 Watts of
power for the short time required for the protection circuitry
to shut off the power device. This energy can be destructive,
particularly at higher operating voltages (
>
30V) so some
precautions are in order. Proper heat sink design is essential
and it is normally necessary to heat sink the V
supply pin
(pin 6) with 1 square inch of copper on the PCB.
DS010568-24
FIGURE 4. Transitions in Brake, Direction, or PWM Must Be Separated By At Least 1 μsec
L
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