參數(shù)資料
型號(hào): LM95235CIMM
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類(lèi): 溫度/濕度傳感器
英文描述: Precision Remote Diode Temperature Sensor with SMBus Interface and TruTherm Technology
中文描述: DIGITAL TEMP SENSOR-SERIAL, 11BIT(s), 2Cel, SQUARE, SURFACE MOUNT
封裝: MO-187, MSOP-8
文件頁(yè)數(shù): 17/25頁(yè)
文件大?。?/td> 784K
代理商: LM95235CIMM
2.0 LM95235 Registers
(Continued)
For data synchronization purposes, the MSB register should be read first if the user wants to read both MSB and LSB registers.
The LSB will be locked after the MSB is read. The LSB will be unlocked after being read. If the user reads MSBs consecutively,
each time the MSB is read, the LSB associated with that temperature will be locked in and override the previous LSB value
locked-in.
2.2 DIODE CONFIGURATION REGISTERS
Configuration Register 2
(Read/write Address BFh):
D7
D6
D5
D4
D3
D2
D1
D0
0
OS/A0 Function Select
OS Fault Mask
T_CRIT
Mask
TruTherm Select
RFE1
RFE0
1
Bits
7
Name
Reserved
Description
Reports "0" when read.
0: Address (A0) function is enabled
1: Over-temperature Shutdown (OS) is enabled
0: Off
1: On
0: Off
1: On
0: Selects Diode Model 2, MMBT3904, with TruTherm technology
disabled.
1: Selects Diode Model 1, A typical Intel Processor, with 65 nm or
90 nm technology, and TruTherm technology enabled.
00: Filter Disable
01: Reserved
10: Reserved
11: Filter Enable
Reports "1" when read.
6
OS/A0 Function Select
5
Diode Fault Mask for OS
4
Diode Fault Mask for T_CRIT
3
Remote Diode TruTherm
Mode Select
2-1
Remote Filter Enable
0
Reserved
Power up default is 1Fh.
Remote Offset High Byte (2’s Complement)
(R/W Address 11h) 10-bit plus sign format:
BIT
Value
D7
SIGN
D6
64
D5
32
D4
16
D3
8
D2
4
D1
2
D0
1
Power up default is 00h.
Remote Offset Low Byte (2’s Complement)
(R/W Address 12h) 10-bit plus sign format:
BIT
Value
D7
0.50
D6
0.25
D5
0.125
D4
0
D3
0
D2
0
D1
0
D0
0
Power up default is 00h. LSb = 0.125 C.
L
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