參數(shù)資料
型號(hào): LM75BD,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 11/37頁(yè)
文件大?。?/td> 520K
描述: IC TEMP SENSOR DIGITAL 8-SOIC
特色產(chǎn)品: Digital Temperature Sensor / Thermal Watchdog
標(biāo)準(zhǔn)包裝: 100
功能: 溫度監(jiān)視系統(tǒng)(傳感器),監(jiān)視器
傳感器類型: 內(nèi)部
感應(yīng)溫度: -55°C ~ 125°C
精確度: ±3°C(最小值)
拓?fù)洌?/td> ADC(三角積分型),比較器,振蕩器,寄存器庫(kù)
輸出類型: 2 線串行,I²C?
輸出警報(bào): 無(wú)
輸出風(fēng)扇:
電源電壓: 2.8 V ~ 5.5 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
其它名稱: 935285837112
LM75BD
LM75BD-ND
LM75B
All information provided in this document is subject to legal disclaimers.
?NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 5  22 January 2014
11 of 37
NXP Semiconductors
LM75B
Digital temperature sensor and thermal watchdog
 
7.5   OS output and polarity
The OS output is an open-drain output and its state represents results of the device
watchdog operation as described in Section 7.1
. In order to observe this output state, an
external pull-up resistor is needed. The resistor should be as large as possible, up to
200 kW, to minimize the Temp reading error due to internal heating by the high OS sinking
current.
The OS output active state can be selected as HIGH or LOW by programming bit B2
(OS_POL) of register Conf: setting bit OS_POL to logic 1 selects OS active HIGH and
setting bit B2 to logic 0 sets OS active LOW. At power-up, bit OS_POL is equal to logic 0
and the OS active state is LOW.
7.6  OS comparator and interrupt modes
As described in Section 7.1
, the device OS output responds to the result of the
comparison between register Temp data and the programmed limits, in registers Tos and
Thyst, in different ways depending on the selected OS mode: OS comparator or
OS interrupt. The OS mode is selected by programming bit B1 (OS_COMP_INT) of
register Conf: setting bit OS_COMP_INT to logic 1 selects the OS interrupt mode, and
setting to logic 0 selects the OS comparator mode. At power-up, bit OS_COMP_INT is
equal to logic 0 and the OS comparator is selected.
The main difference between the two modes is that in OS comparator mode, the OS
output becomes active when Temp has exceeded T
th(ots)
 and reset when Temp has
dropped below T
hys
, reading a register or putting the device into shutdown mode does not
change the state of the OS output; while in OS interrupt mode, once it has been activated
either by exceeding T
th(ots)
 or dropping below T
hys
, the OS output will remain active
indefinitely until reading a register, then the OS output is reset.
Temperature limits T
th(ots)
 and T
hys
 must be selected so that T
th(ots)
 > T
hys
. Otherwise, the
OS output state will be undefined.
Table 13.   Tos and Thyst limit data and value
11-bit binary
(twos complement)
Hexadecimal value
Decimal value
Value
0 1111 1010
0FA
250
+125.0 癈
0 0011 0010
032
50
+25.0 癈
0 0000 0001
001
1
+0.5 癈
0 0000 0000
000
0
0.0 癈
1 1111 1111
1FF
-1
-0.5 癈
1 1100 1110
1CE
-50
-25.0 癈
1 1001 0010
192
-110
-55.0 癈
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