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參數(shù)資料
| 型號(hào)： | LM555H-MLS/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬波形發(fā)生器 |
| 英文描述： | PULSE; RECTANGULAR, TIMER, MBCY8 |
| 封裝： | TO-5, 8 PIN |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 443K |
| 代理商： | LM555H-MLS/NOPB |
Applications Information (Continued)
50% DUTY CYCLE OSCILLATOR
For a 50% duty cycle, the resistors R
A and RB may be con-
nected as in
Figure 14. The time period for the output high is
the same as previous, t
1 = 0.693 RA C. For the output low it
is t
2 =
Thus the frequency of oscillation is
Note that this circuit will not oscillate if R
B is greater than 1/2
R
A because the junction of RA and RB cannot bring pin 2
down to 1/3 V
CC and trigger the lower comparator.
ADDITIONAL INFORMATION
Adequate power supply bypassing is necessary to protect
associated circuitry. Minimum recommended is 0.1F in par-
allel with 1F electrolytic.
Lower comparator storage time can be as long as 10s
when pin 2 is driven fully to ground for triggering. This limits
the monostable pulse width to 10s minimum.
Delay time reset to output is 0.47s typical. Minimum reset
pulse width must be 0.3s, typical.
Pin 7 current switches within 30ns of the output (pin 3) volt-
age.
DS007851-18
FIGURE 14. 50% Duty Cycle Oscillator
LM555
www.national.com
10
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