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參數(shù)資料
| 型號(hào)： | LM4936 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Stereo 2W Audio Power Amplifiers with Volume Control and Selectable Control Interface (SPI or I2C) |
| 中文描述： | 2W的立體聲音頻功率放大器，帶有音量控制和可選控制接口（SPI或I2C） |
| 文件頁數(shù)： | 24/28頁 |
| 文件大?。?/td> | 1490K |
| 代理商： | LM4936 |
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Application Information
(Continued)
SPI TIMING DIAGRAM
SPI OPERATIONAL REQUIREMENTS
1. The maximum clock rate is 5MHz for the CLK pin.
2. CLK must remain logic-high for at least 100ns (t
) after
the rising edge of CLK, and CLK must remain logic-low for at
least 100ns (t
CL
) after the falling edge of CLK.
3. Data bits are written to the DATA pin with the most
significant bit (MSB) first.
4. The serial data bits are sampled at the rising edge of CLK.
Any transition on DATA must occur at least 50ns (t
DS
) before
the rising edge of CLK. Also, any transition on DATA must
occur at least 50ns (t
DH
) after the rising edge of CLK and
stabilize before the next rising edge of CLK.
5. ENABLE should be logic-low only during serial data trans-
mission.
6. ENABLE must be logic-low at least 50ns (t
) before the
first rising edge of CLK, and ENABLE has to remain logic-
low at least 50ns (t
EH
) after the eighth rising edge of CLK.
7. If ENABLE remains logic-high for more than 50ns before
all 8 bits are transmitted then the data latch will be aborted.
8. If ENABLE is logic-low for more than 8 CLK pulses then
only the first 8 data bits will be latched and activated at rising
edge of eighth CLK.
9. ENABLE must remain logic-high for at least 50ns (t
EL
).
10. Coincidental rising or falling edges of CLK and ENABLE
are not allowed. If CLK is to be held logic-high after the data
transmission, the falling edge of CLK must occur at least
50ns (t
CS
) before ENABLE transitions to logic-low for the
next set of data.
20117823
FIGURE 4.
L
www.national.com
24
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM49360 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Mono Class D Audio Codec PMU with Ground Referenced Headphone Amplifiers, Earpiece Driver, Audio DSP, 2 Step-Down DC-DC Converters, and 7 LDO Regulators |
| LM49360RL | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Mono Class D Audio Codec PMU with Ground Referenced Headphone Amplifiers, Earpiece Driver, Audio DSP, 2 Step-Down DC-DC Converters, and 7 LDO Regulators |
| LM49360RLX | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Mono Class D Audio Codec PMU with Ground Referenced Headphone Amplifiers, Earpiece Driver, Audio DSP, 2 Step-Down DC-DC Converters, and 7 LDO Regulators |
| LM4936MH | 功能描述:音頻放大器 RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| LM4936MH/NOPB | 功能描述:音頻放大器 Stereo 2W Audio Pwr Amp RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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