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參數(shù)資料
| 型號(hào)： | LM4935WLX |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | ADC |
| 英文描述： | Audio Sub-System with Dual-Mode Stereo Headphone and Mono High Efficiency Loudspeaker Amplifiers and Multi-Purpose ADC |
| 中文描述： | 音頻子系統(tǒng)的雙模單聲道立體聲耳機(jī)和揚(yáng)聲器放大器的高效率和多功能模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 30/112頁 |
| 文件大?。?/td> | 5017K |
| 代理商： | LM4935WLX |
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12.0 Status & Control Registers
(Continued)
These tables cover the most common applications, obtaining clocks for derivative sample rates such as 22.05 kHz should be
done by increasing the P divider value or using the R/Q dividers.
If the user needs to obtain a clock unrelated to those described above, the following method is advised. An example of obtaining
12.000 MHz from 1.536 MHz is shown below (this is typical for deriving DAC clocks from I2S datastreams).
Choose a small range of P so that the VCO frequency is swept between 40 MHz and 60 MHz. So for P = 3 to 5, sweep the M
inputs from 1 to 3. The most accurate N and N_MOD can be calculated by:
N = FLOOR(((Fout/Fin)*(P*M)),1)
N_MOD = ROUND(32*((((Fout)/Fin)*(P*M)-N),0)
This shows that setting M = 1, N = 39+1/16, P = 5 (i.e. PLL_M = 0, PLL_N = 39, PLL_N_MOD = 2, & PLL_P = 4) gives a
comparison frequency of 1.5 MHz, a VCO frequency of 60 MHz and an output frequency of 12.000 MHz. The same settings can
be used to get 11.025 from 1.4112 MHz for 44.1 kHz sample rates.
Care must be taken when synchronization of isochronous data is not possible, i.e. when the PLL has to be used but an exact
frequency match cannot be found. The I2S should be master on the LM4935 so that the data source can support appropriate SRC
as required. This method should only be used with data being read on demand to eliminate sample rate mismatch problems.
Where a system clock exists at an integer multiple of the required ADC or DAC clock rate it is preferable to use this rather than
the PLL. The LM4935 is designed to work in 8, 12, 16, 24, 48 kHz modes from a 12 MHz clock and 8, 13, 26, 52 kHz modes from
a 13 MHz clock without the use of the PLL. This saves power and reduces clock jitter which can affect SNR.
The actual ADC and DAC sample rates are set up by the PLL and internal clock dividers.
L
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| LM4951 | Wide Voltage Range 1.8 Watt Audio Amplifier |
| LM4953 | Ground-Referenced, Ultra Low Noise, Ceramic Speaker Driver |
| LM4953SD | Ground-Referenced, Ultra Low Noise, Ceramic Speaker Driver |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM4936 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Stereo 2W Audio Power Amplifiers with Volume Control and Selectable Control Interface (SPI or I2C) |
| LM49360 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Mono Class D Audio Codec PMU with Ground Referenced Headphone Amplifiers, Earpiece Driver, Audio DSP, 2 Step-Down DC-DC Converters, and 7 LDO Regulators |
| LM49360RL | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Mono Class D Audio Codec PMU with Ground Referenced Headphone Amplifiers, Earpiece Driver, Audio DSP, 2 Step-Down DC-DC Converters, and 7 LDO Regulators |
| LM49360RLX | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Mono Class D Audio Codec PMU with Ground Referenced Headphone Amplifiers, Earpiece Driver, Audio DSP, 2 Step-Down DC-DC Converters, and 7 LDO Regulators |
| LM4936MH | 功能描述:音頻放大器 RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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