參數(shù)資料
型號: LM4930ITL
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 消費(fèi)家電
英文描述: CAP CER 15000PF 10% 50V X7R 1206
中文描述: SPECIALTY CONSUMER CIRCUIT, PBGA36
封裝: MICRO SMD-36
文件頁數(shù): 5/33頁
文件大?。?/td> 966K
代理商: LM4930ITL
SYSTEM CONTROL REGISTERS
Basic Config Register
(Continued)
(Continued)
10
PCM_ALWAYS_ON
This bit should be set if another codec is using the PCM bus. When set, the LM4930 will
drive the clock and sync signals in all modes except Powerdown (Note 12)
I2S master or slave select. If set then I2S = master. Cleared = slave
I2S resolution select. If set then 32 bits per frame. If cleared then 16 bits per frame
RESERVED (Note 13)
RESERVED (Note 13)
RESERVED (Note 13)
11
12
13
14
15
I2S_M/S
I2S_RES
RSVD
RSVD
RSVD
Voice/Test Config Registers
This register configures the voiceband codec, sidetone attenuation, and selected control functions. The 7 bit address for the
VOICE TESTCONFIG register is XX10001.
(X = 0 if ADDR is set to logic 0)
VOICETESTCONFIG (XX10001).
(Set = logic 1, Clear = logic 0)
(X = 1 if ADDR is set to logic 1)
BIT
RESET
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Address
0
Register
CLASS
Description
If set, configures the chip for use with an external class D or linear amplifier and turns the
BTL speaker output into a buffer. (Note 12)
SIDESTONE_ATTEN Programs the attenuation of the digital sidetone. Attenuation is set as follows:
4:1
Sidetone
Attenuation
0000
Mute
0001
-30dB
0010
-27dB
0011
-24dB
0100
-21dB
0101
-18dB
0110
-15dB
0111
-12dB
AUTOSIDE
This feature is included for use with the mono speaker in hands-free applications where
sidetones may not be desirable. If set, the sidetone is always muted in voice over mono
speaker modes (0010, 0100, 1001, and 1010), otherwise the sidetone is present at whatever
level is set in the gain control register
CLOCK_DIV
If set, allows for the use of a 24.576MHz crystal. Default setting is for 12.288MHz crystal.
(Note 12)
ZXD_DISABLE
Disables the zero crossing detect in the stereo DAC to guarantee immediate mode changes
rather than waiting for a zero cross. (Note 11)
RSVD
RESERVED (Note 13)
CAP_SIZE
Set to accomodate different bypass capacitor values to give correct turn-off delay and
click/pop performance. Value is set as follows: (Note 12)
10:11
Delay
Bypass Capacitor Size
00
25ms
0.1μF
01
50ms
0.39μF
10
85ms
1μF
11
RESERVED
RESERVED
ZXDS_SLOW
If set, this forces the stereo DAC outputs to wait for a zero crossing before powering down
MUTE_LS
If set, mutes the loudspeaker amplifier in any mode where it is not already muted
MUTE_HP
If set, mutes the headphone amplifier in any mode where it is not already muted
MUTE_MIC
If set, mutes the microphone preamp
4:1
4:1
Sidetone Attenuation
1000
1001
1010
1011
1100
1101
1110
1111
-9dB
-6dB
-3dB
0dB
Mute
Mute
Mute
Mute
5
6
7
8:9
10:11
12
13
14
15
L
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LM4930LQ 功能描述:音頻放大器 RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel
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