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參數(shù)資料
| 型號： | LM4549 |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | Codec |
| 英文描述： | AC ’97 Rev 2.1 Codec with Sample Rate Conversion and National 3D Sound |
| 中文描述： | 交流\u0026#39;97活2.1編解碼器的采樣率轉(zhuǎn)換和國家3D聲音 |
| 文件頁數(shù)： | 16/18頁 |
| 文件大小： | 324K |
| 代理商： | LM4549 |
Application Information
(Continued)
When the AC Link
″
Codec Ready
″
indicator bit (SDATA_IN
slot 0, bit 15) is a
″
1
″
, it indicates that theAC Link andAC ’97
registers are in a fully operational state. The AC ’97 Control-
ler must further probe the Powerdown Control / Status Reg-
ister to determine exactly which subsections are ready.
BIT
REF
ANL
DAC
ADC
Function
Vref’s up to nominal level
Analog mixers ready
DAC section ready to accept data
ADC section ready to transmit data
Supported powerdown modes.
BIT
PRO
PR1
PR2
PR3
Function
PCM in ADC’s and Input Mux powerdown
PCM out DAC’s powerdown
Analog Mixer powerdown (VREF still on)
Analog Mixer powerdown (VREF off)
Digital Interface (AC Link) powerdown
(external clk off)
Internal Clk disable
not used
External amplifier powerdown
PR4
PR5
PR6
EAPD
Extended Audio ID Register (28h)
This read only register identifies which AC97 Extended Au-
dio features are supported. The LM4549 provides for VRA
(Variable RateAudio) and Multiple Codec support. VRAis in-
dicated by a
″
1
″
in the LSB of register 28h. The two MSB’s,
ID1 and ID0, show the current codec configuration as con-
nected via external pins 45 and 46. Note that the external
logic connection to pins 45 and 46 are inverse in polarity to
the internal register setting.
Pin46 (ID1)
NC (not
connected)
DVdd
DVdd
GND
GND
Pin45 (ID0)
NC (not
connected)
DVdd
GND
DVdd
GND
Reg 28h ID1
Reg 28h ID0
Codec Mode
Primary
0
0
0
0
1
1
0
1
0
1
Primary
Secondary 1
Secondary 2
Secondary 3
Extended Audio Status/Control Register (2Ah)
This read/write register provides status and control of the
Variable Sample Rate function. Setting the LSB of this regis-
ter to
″
1
″
enables Variable Rate Audio (VRA) mode and al-
lows DAC and ADC sample rates to be programmed via reg-
isters 2Ch and 32h.
BIT
VRA
Function
0 = VRA off (48kHz fixed), 1 = VRA on
Sample Rate Control Registers (2Ch, 32h)
These read/write registers are used to set the sample rate
for the left and right channels of the DAC (2Ch) and the ADC
(32h). When Variable Rate Audio is enabled via bit-0 of Reg-
ister 2Ah, the sample rates can be programmed, in 1Hz in-
crements, to be any value from 4kHz to 48kHz. Below is a list
of the most common sample rates and their corresponding
register values.
SR15:SR0
1F40h
2B11h
3E80h
5622h
AC44h
BB80h
Sample Rate (Hz)
8000
11025
16000
22050
44100
48000
Reserved Registers
Do not write to these registers as they are reserved.
www.national.com
16
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM4549A | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:AC ’97 Rev 2.1 Codec with Sample Rate Conversion and National 3D Sound |
| LM4549AVH | 制造商:Rochester Electronics LLC 功能描述:AC97 REV2.1 CODEC - Bulk 制造商:OC White Company 功能描述:Audio Codec 2ADC / 2DAC 18-Bit 48-Pin LQFP Tray |
| LM4549AVH WAF | 制造商:Texas Instruments 功能描述: |
| LM4549AVH/NOPB | 制造商:Texas Instruments 功能描述:Audio Codec 2ADC / 2DAC 18-Bit 48-Pin LQFP Tray |
| LM4549AVHX | 制造商:Rochester Electronics LLC 功能描述:AC97 REV2.1 CODEC - Bulk |
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