參數(shù)資料
型號(hào): LM4121AIADJMWA
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: 1-OUTPUT THREE TERM VOLTAGE REFERENCE, 1.216 V, UUC
封裝: WAFER
文件頁數(shù): 5/19頁
文件大小: 490K
代理商: LM4121AIADJMWA
Pin Functions
Output (Pin 5): Reference Output.
Input (Pin 4):Positive Supply.
Ground (Pin 2):Negative Supply or Ground Connection.
Enable (Pin 3):Pulled to input for normal operation. Forcing
this pin to ground will turn-off the output.
REF (Pin 1):REF Pin (1.25V option only). This pin should be
left unconnected for 1.25V option.
Adj (Pin 1):V
OUT Adj Pin (Adjustable option only). See Ap-
plication Hints section.
Application Hints
The standard application circuit for the LM4121 is shown in
Figure 1. The output voltage is set with the two feedback
resistors, according to the following formula:
V
OUT =[Vref(1+ R1/R2] Ibias R1
Values for R1 and R2 should be chosen to be less than 1
M
.I
bias typically flows out of the adjust pin. Values for Vref
and I
bias are found in the Electrical Characteristics Spec.
table. For best accuracy, be sure to take into account the
variation of V
REF with input voltage, load and output voltage.
The LM4121 is designed to be stable with ceramic output
capacitors in the range of 0.022F to 0.047F. Note that
0.022F is the minimum required output capacitor. These
capacitors typically have an ESR of about 0.1 to 0.5
.
Smaller ESR can be tolerated, however larger ESR can not.
The output capacitor can be increased to improve load tran-
sient response, up to about 1F. However, values above
0.047F must be tantalum. With tantalum capacitors, in the
1F range, a small capacitor between the output and the
reference (Adj) pin is required. This capacitor will typically be
in the 50pF range. Care must be taken when using output
capacitors of 1F or larger. These application must be thor-
oughly tested over temperature, line and load. Also, when
the LM4121 is used as a controller, with external active
components, each application must be carefully tested to
ensure a stable design. The adjust pin is sensitive to noise
and capacitive loading. The trace to this pin must be as short
as possible and the feedback resistiors should be close to
this pin. Also, a single point ground to the LM4121 will help
ensure good accuracy at high load currents.
An input capacitor is typically not required. However, a 0.1F
ceramic can be used to help prevent line transients from
entering the LM4121. Larger input capacitors should be
tantalum or aluminium.
The enable pin is an analog input with very little hysteresis.
About 6A into this pin is required to turn the part on, and it
must be taken close to GND to turn the part off (see spec.
table for thresholds). There is a
minimum slew rate on this
pin of about 0.003V/S to prevent glitches on the output. All
of these conditions can easily be met with ordinary CMOS or
TTL logic. If the shutdown feature is not required, then this
pin can safely be connected directly to the input supply.
Floating this pin is not recommended.
Printed Circuit Board Layout Consideration
The mechanical stress due to PC board mounting can cause
the output voltage to shift from its initial value. References in
SOT packages are generally less prone to assembly stress
than devices in Small Outline (SOIC) package.
To reduce the stress-related output voltage shifts, mount the
reference on the low flex areas of the PC board such as near
to the edge or the corner of the PC board.
DS101291-32
DS101291-43
FIGURE 1. Standard Application Circuit
LM4121
www.national.com
13
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