Electrical Characteristics
(Continued)
Specifications in standard type face are for T
= 25C and those in
boldface type
apply over the full
Operating Temperature
Range (T
J
= 40C to +125C)
. Unless otherwise specified V
IN
=2.7V and specifications apply to both LM3501-16 and
LM3501-21.
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 7)
Max
(Note 6)
0.43
2.3
Units
R
DSON
NMOS Switch R
DSON
PMOS Switch R
DSON
Duty Cycle Limit
(LM3501-16)
Duty Cycle Limit
(LM3501-21)
Switching Frequency
SHDN Pin Current (Note 9)
V
IN
= 2.7V, I
SW
= 300 mA
V
OUT
= 6V, I
SW
= 300 mA
FB = 0V
1.3
D
Limit
87
%
FB = 0V
94
F
SW
I
SD
0.8
1.0
1.8
1
0.1
10
4
0.01
1.2
4
2.5
MHz
SHDN = 5.5V
SHDN = 2.7V
SHDN = GND
V
CNTRL
= 2.7V
V
CNTRL
= 1V
V
SW
= 15V
μA
I
CNTRL
CNTRL Pin Current (Note 9)
20
15
0.5
μA
I
L
Switch Leakage Current
(LM3501-16)
Switch Leakage Current
(LM3501-21)
Input Undervoltage Lockout
μA
V
SW
= 20V
0.01
2.0
UVP
ON Threshold
OFF Threshold
ON Threshold
OFF Threshold
ON Threshold
OFF Threshold
V
OUT
= 15V, SHDN = 1.5V
2.4
2.3
15
14
20
19
2.5
2.4
15.5
14.6
20.5
19.5
2.6
2.5
16
15
21
20
V
OVP
Output Overvoltage Protection
(LM3501-16)
V
Output Overvoltage Protection
(LM3501-21)
I
Vout
V
OUT
Leakage Current
(LM3501-16)
V
OUT
Leakage Current
(LM3501-21)
PMOS Switch Leakage Current
(LM3501-16)
PMOS Switch Leakage Current
(LM3501-21)
260
400
μA
V
OUT
= 20V, SHDN = 1.5V
300
460
I
VL
V
OUT
= 15V, V
SW
= 0V
0.01
3
μA
V
OUT
= 20V, V
SW
= 0V
0.01
3
CNTRL
Threshold
LED power off
LED power on
75
125
0.65
0.65
mV
SHDN
Threshold
SHDN low
SHDN High
0.3
V
1.1
Note 1:
Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to
be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2:
This condition applies if V
IN
<
V
OUT
. If V
IN
>
V
OUT
, a voltage greater than V
IN
+ 0.3V should not be applied to the V
OUT
or V
SW
pins.
Note 3:
The human body model is a 100 pF capacitor discharged through a 1.5 k
resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin.
Note 4:
The maximum allowable power dissipation is a function of the maximum operating junction temperature, T
, the junction-to-ambient thermal
resistance,
θ
JA
, and the ambient temperature, T
A
. See the
Thermal Properties
section for the thermal resistance. The maximum allowable power dissipation at any
ambient temperature is calculated using: P
D
(MAX) = (T
J(MAX)
T
A
)/
θ
JA
. Exceeding the maximum allowable power dissipation will cause excessive die temperature.
Note 5:
Junction-to-ambient thermal resistance (
θ
JA
) is highly application and board-layout dependent. The 75
o
C/W figure provided was measured on a 4-layer test
board conforming to JEDEC standards. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues when
designing the board layout.
Note 6:
All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are production
tested, guaranteed through statistical analysis or guaranteed by design. All limits at temperature extremes are guaranteed via correlation using standard Statistical
Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 7:
Typical numbers are at 25C and represent the most likely norm.
Note 8:
Feedback current flows out of the pin.
Note 9:
Current flows into the pin.
L
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