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參數(shù)資料
| 型號： | LM2792LDX-H |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | Silver Mica Capacitor; Capacitance:6800pF; Capacitance Tolerance:+/- 5%; Series:CDV30; Voltage Rating:1500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:11.1mm; Leaded Process Compatible:No RoHS Compliant: No |
| 中文描述： | LED DISPLAY DRIVER, DSO10 |
| 封裝： | 3 X 3 MM, 0.80 MM HEIGHT, LLP-10 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 204K |
| 代理商： | LM2792LDX-H |
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 1)
V
IN
BRGT, SD
Power Dissipation (Note 2)
T
JMAX
(Note 2)
θ
JA
(Note 7)
Storge Temperature
Lead Temp. (Soldering, 5 sec.)
ESD Rating
0.3 to 6.0V
0.3 to (V
IN
+0.2V)
400 mW
150C
55C/W
65C to +150C
260C
Human Body Model
Machine Model
2KV
200V
Operating Conditions
Input Voltage (V
IN
)
BRGT
Ambient Temperature (T
A
)
34mAOperating Junction
Temperature
3.0V to 5.8V
0 to 3.0V
30C to +85C
30C to 100C
Electrical Characteristics
Limits in standard typeface are for T
J
= 25C and limits in
boldface type
apply over the full
Operating Temperature Range
.
Unless otherwise specified, C
1
= C
IN
= C
HOLD
= 1 μF, V
IN
= 3.6V, BRGT pin = 2.75V.
Symbol
Parameter
Conditions
I
DX
Available Current at Output Dx
3.0V
≤
V
IN
≤
5.8V
V
Dx
≤
3.6V
R
SET
= 1650
V
BRGT
= 3V
I
DX
Line Regulation of Dx Output
Current
V
Dx
≤
3.6V
R
SET
= 1800
V
BRGT
= 2.75V
V
DX
Load Regulation of Dx Output
Current
V
Dx
= 3.0V
V
Dx
= 4.0V
R
SET
= 1800
V
BRGT
= 2.75V
I
D-MATCH
Current Matching Between Any
Two Outputs
BRGT = 2.75V, V
IN
= 3.6V,
R
SET
= 1800
I
Q
Quiescent Supply Current
3.0V
≤
V
IN
≤
4.4V, Active, No
Load Current
I
SD
Shutdown Supply Current
3.0V
≤
V
IN
≤
5.5V, Shutdown
At 85C
V
IH
SD Input Logic High
3.0V
≤
V
IN
≤
5.5V, Note5
V
IL
SD Input Logic Low
3.0V
≤
V
IN
≤
5.5V, Note5
I
LEAK-SD
SD Input Leakage Current
0V
≤
V
SD
≤
V
IN
R
BRGT
BRGT Input Resistance
BRGT
Brightness Voltage Range
I
SET
I
SET
Pin Output Current
f
SW
Switching Frequency (Note 4)
3.0V
≤
V
IN
≤
4.4V
I
D1
= I
D2
≤
16mA
t
START
Startup Time (Note 6)
I
Dx
= 90% steady state
Min
14.5
Typ
16.8
Max
Units
mA
3.0V
≤
V
IN
≤
4.4V
13.5
16
17.8
mA
V
IN
= 3.6V
16.1
15.4
mA
V
D1
= V
D2
= 3.6V,
0.3
%
1.4
2.7
mA
0.1
0.3
1
μA
0.8* V
IN
V
V
μA
k
V
mA
kHz
0.2* V
IN
0.01
250
0
3.0
I
Dx
/25
1100
900
1800
10
μs
Note 1:
Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
beyond its rated operating conditions.
Note 2:
D1 and D2 may be shorted to GND without damage. P
OUT
may be shorted to GND for 1sec without damage.
Note 3:
In the test circuit, all capacitors are 1.0μF, 0.3
maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output
voltage and efficiency.
Note 4:
The output switches operate at one half of the oscillator frequency, f
OSC
= 2f
SW
.
Note 5:
The internal thresholds of the Shutdown bar are set at about 40% of V
IN
Note 6:
This electrical specification is quarantee by design
Note 7:
For more information regarding the LLP package, please refer to National Semiconductor Application note AN1187
L
www.national.com
4
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