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參數(shù)資料
| 型號： | LM2720 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 5-Bit Programmable, High Frequency Multi-phase PWM Controller |
| 中文描述： | 5位可編程，高頻多相PWM控制器 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大小： | 149K |
| 代理商： | LM2720 |
Electrical Characteristics
(Continued)
V
5V = 5V, V
12V = 12V unless otherwise specified. Typicals and limits appearing in plain type apply for T
A
= T
J
= +25C.
Limits appearing in
boldface
type apply over the entire operating temperature range.
Symbol
Parameter
Conditions
I
PWRGD
Power Good Sink Current
V
PWRGD
= 0.4V
V
OCC_CM
Over-current Comparator
Common Mode Range
IB_OC+
OC+ Input Bias Current
V
IN
= 5V, OC+ = 5V, OC =
4V
IB_OC
OC Input Bias Current
V
IN
= 5V, OC+ = 6V, OC =
5V
V
OS_OCC
Over-current Comparator Input
Offset Voltage
V
IN
= 12V
D
MAX
Maximun Duty Cycle
FB = 0V
gm
Error Amplifier
Transconductance
V
ramp
Ramp Signal Peak-to-Peak
Amplitude
I
comp
COMP Pin Source Current
I
comp
COMP Pin Sink Current
V
comp_hi
COMP Pin High Clamp
V
comp_lo
COMP Pin Low Clamp
V
POR
Power On Reset Trip Point
Vcc5V Pin Voltage Rising
Vcc5V Pin Voltage Falling
Vcc12V Minimum Working
Voltage
t
SS
Soft Start Delay
F
OSC
= 8MHz
Min
0.8
3
Typ
1
Max
Units
mA
V
12
100
145
200
μA
85
120
165
μA
V
IN
= 5V
2
16
21
78
1.36
42
mV
%
mmho
2
V
250
160
360
260
2.9
0.19
4.0
3.6
3.8
550
400
μA
μA
V
V
V
(Note 7)
V
1.6
ms
Note 1: Absolute Maximum Ratings
are limits beyond which damage to the device may occur.
Operating ratings
do not imply guaranteed performance limits.
Note 2:
Maximum allowable power dissipation is a function of the maximum junction temperature, T
, the junction-to-ambient thermal resistance,
θ
JA
, and the
ambient temperature, T
A
. The maximum allowable power dissipation at any ambient temperature is calculated using: P
MAX
= (T
JMAX
T
A
)/
θ
JA
. The
junction-to-ambient thermal resistance,
θ
JA
, for LM2720 is 78C/W. For a T
JMAX
of 150C and T
A
of 25C, the maximum allowable power dissipation is 1.6W.
Note 3:
The letter
N
stands for the typical output voltages appearing in
italic boldface
type in Table 1
Note 4: Max
value of logic low means any voltage below this value is guaranteed to be taken as logic low whereas a voltage higher than this value is not guaranteed
to be taken as a logic low.
Note 5: Min
value of logic high means any voltage above this value is guaranteed to be taken as logic high whereas a voltage lower than this value is not guaranteed
to be taken as a logic high.
Note 6:
When driving bipolar FET drivers in the typical application circuit.
Note 7:
When Vcc12V pin goes below this voltage, all DRV pins go to 0V.
Note 8:
ESD ratings is based on the human body model, 100pF discharged through 1.5k
.
L
www.national.com
3
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