參數(shù)資料
型號(hào)： LM26480SQ-BF/NOPB
廠(chǎng)商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： 穩(wěn)壓器
英文描述： 2.4 A SWITCHING REGULATOR, 2400 kHz SWITCHING FREQ-MAX, QCC24
封裝： 4 X 4 MM, 0.80 MM HEIGHT, LLP-24
文件頁(yè)數(shù)： 25/30頁(yè)
文件大?。?/td> 2447K
代理商： LM26480SQ-BF/NOPB
Pin Descriptions
LLP Pin No.
Name
I/O
Type
Description
1
VINLDO12
I
PWR
Analog Power for Internal Functions (VREF, BIAS, I2C, Logic)
2
SYNC
I
G/(D)
Frequency Synchronization pin which allows the user to connect an
external clock signal to synchronize the PMIC internal oscillator.
Default OFF and must be grounded when not used. Part number
LM26480SQ-BF has this feature enabled.
3
NPOR
O
D
nPOR Power on reset pin for both Buck1 and Buck 2. Open drain logic
output 100K pullup resistor. nPOR is pulled to ground when the
voltages on these supplies are not good. See nPOR section for more
info.
4
GND_SW1
G
Buck1 NMOS Power Ground
5
SW1
O
PWR
Buck1 switcher output pin
6
VIN1
I
PWR
Power in from either DC source or Battery to Buck1
7
ENSW1
I
D
Enable Pin for Buck1 switcher, a logic HIGH enables Buck1. Pin cannot
be left floating.
8
FB1
I
A
Buck1 input feedback terminal
9
GND_C
G
Non-switching core ground pin
10
AVDD
I
PWR
Analog Power for Buck converters
11
FB2
I
A
Buck2 input feedback terminal
12
ENSW2
I
D
Enable Pin for Buck2 switcher, a logic HIGH enables Buck2. Pin cannot
be left floating.
13
VIN2
I
PWR
Power in from either DC source or Battery to Buck2
14
SW2
O
PWR
Buck2 switcher output pin
15
GND_SW2
G
Buck2 NMOS
16
ENLDO2
I
D
LDO2 enable pin, a logic HIGH enables LDO2. Pin cannot be left
floating.
17
ENLDO1
I
D
LDO1 enable pin, a logic HIGH enables LDO1. Pin cannot be left
floating.
18
GND_L
G
LDO ground
19
VINLDO1
I
PWR
Power in from either DC source or battery to LDO1
20
LDO1
O
PWR
LDO1 Output
21
FBL1
I
A
LDO1 Feedback Terminal
22
FBL2
I
A
LDO2 Feedback Terminal
23
LDO2
O
PWR
LDO Output
24
VINLDO2
I
PWR
Power in from either DC source or battery to LDO2.
DAP
GND
Connection isn't necessary for electrical performance, but it is
recommended for better thermal dissipation.
A:
Analog Pin
D:
Digital Pin
G:
Ground Pin
PWR:
Power Pin
I
: Input Pin
I/O:
Input/Output Pin
O:
Output Pin
Power Block Operation
Note
Power Block Input
Enabled
Disabled
VINLDO12
VIN+
Always Powered
AVDD
VIN+
Always Powered
VIN1
VIN+
VIN+ or 0V
VIN2
VIN+
VIN+ or 0V
VINLDO1
≤ VIN+
If Enabled, Min VIN is 1.74V
VINLDO2
≤ VIN+
If Enabled, Min VIN is 1.74V
VIN+ is the largest potential voltage on the device.
www.national.com
4
LM26480
相關(guān)PDF資料
PDF描述
LM26480SQX-BF/NOPB 2.4 A SWITCHING REGULATOR, 2400 kHz SWITCHING FREQ-MAX, QCC24
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LM2660MMX/NOPB SWITCHED CAPACITOR CONVERTER, 40 kHz SWITCHING FREQ-MAX, PDSO8
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