參數(shù)資料
型號: LM2647MTC
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: Dual Synchronous Buck Regulator Controller
中文描述: DUAL SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, PDSO28
封裝: TSSOP-28
文件頁數(shù): 7/25頁
文件大?。?/td> 763K
代理商: LM2647MTC
Electrical Characteristics
(Continued)
Specifications with standard typeface are for T
= 25C, and those with
boldface
apply over full Operating Junction Tempera-
ture range. VDD = V5 = 5V, V
SGND
= V
PGND
= 0V, VIN = 15V, V
EN
= 3V, R
FADJ
= 22.1K unless otherwise stated. (Note 5)
Symbol
Parameter
Conditions
Min
(Note 6)
Typical
(Note 7)
-2.2
Max
(Note 6)
Units
V
SW_ZERO
Zero-cross Threshold (SW
Pin)
LDRV goes low
mV
Osillator
PWM Frequency
R
FADJ
= 22.1k
R
FADJ
= 12.4k
R
FADJ
= 30.9k
VIN = 15V
VIN = 24V
255
300
500
200
1.6
2.95
0.8
±
1
±
2
180
345
kHz
PWM Ramp Peak-to-peak
Amplitude
V
PWM Ramp Valley
Frequency Change with VIN
Frequency Change with VDD
Phase Shift Between
Channels
FREQ Pin Voltage vs. VIN
V
%
%
deg
VIN = 5.5V to 24V
VDD = 4.5V to 5.5V
Phase from HDRV1 to HDRV2
165
195
0.105
V/V
System
Minimum ON Time
V
FPWM
= 3V
VIN = 5.5V
VIN = 15V
VIN = 28V, VDD= 4.5V
30
75
50
28
ns
%
%
%
60
40
22
Maxmimum Duty Cycle
Gate Drivers
HDRV Source Impedance
HDRV Sink Impedance
LDRV Source Impedance
HDRV Pin Current (sourcing)= 1.2A
HDRV Pin Current (sinking) = 1A
LDRV Pin Current (sourcing) =
1.2A
LDRV Pin Current (sinking) = 2A
HDRV Falling to LDRV Rising
LDRV Falling to HDRV Rising
7
2
7
LDRV Sink Impedance
Cross-conduction protection
delay (deadtime)
1
40
70
ns
Note 1:
Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is guaranteed. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics table.
Note 2:
PGND1, PGND2 and SGND are all electrically connected together on the PCB.
Note 3:
The maximum allowable power dissipation is calculated by using P
Dmax
= (T
JMAX
- T
A
) /
θ
JA
, where T
JMAX
is the maximum junction temperature, T
A
is the
ambient temperature, and
θ
JA
is the junction-to-ambient thermal resistance of the specified package. The 1.0W rating of the TSSOP-28 package for example results
from using 125C, 25C, and 97C/W for T
JMAX
, T
A
, and
θ
JA
respectively. The 2.85W rating of the 28-pin LLP package results from using 125C, 25C, and 35C/W
for T
JMAX
, T
A
, and
θ
JA
respectively. The rated power dissipation should be derated by 10mW/C above 25C ambient for the TSSOP package and 29mW/C above
25C ambient for the LLP package. The
θ
JA
value above represents the worst-case condition with no heat sinking. Heat sinking will permit more power to be
dissipated at higher ambient temperatures. For detailed information on soldering plastic TSSOP and LLP packages, refer to http://www.national.com/packaging/.
Note 4:
ESD is applied by the human body model, which is a 100pF capacitor discharged through a 1.5 k
resistor into each pin.
Note 5:
R
FADJ
is the frequency adjust resistor between FREQ pin and Ground.
Note 6:
All limits are guaranteed at room temperature (standard face type) and at temperature extremes (bold face type). All room temperature limits are 100%
production tested. All limits at temperature extremes are guaranteed via correlation using Statistical Quality Control (SQC) methods. All limits are used to calculate
Average Outgoing Quality Level (AOQL).
Note 7:
Typical numbers are at 25C and represent the most likely norm.
Note 8:
If the LM2647 starts up with a pre-charged soft start capacitor, it will first discharge the capacitor to V
SS_RESET
and then begin the normal Soft-start process.
L
www.national.com
7
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