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參數(shù)資料
| 型號： | LM2524DN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Regulating Pulse Width Modulator |
| 中文描述： | 0.2 A SWITCHING CONTROLLER, 550 kHz SWITCHING FREQ-MAX, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 1/22頁 |
| 文件大?。?/td> | 1172K |
| 代理商： | LM2524DN |
LM2524D/LM3524D
Regulating Pulse Width Modulator
General Description
The LM3524D family is an improved version of the industry
standard LM3524. It has improved specifications and addi-
tional features yet is pin for pin compatible with existing 3524
families. New features reduce the need for additional exter-
nal circuitry often required in the original version.
The LM3524D has a
±
1% precision 5V reference. The cur-
rent carrying capability of the output drive transistors has
been raised to 200 mA while reducing V
CEsat
and increasing
V
CE
breakdown to 60V. The common mode voltage range of
the error-amp has been raised to 5.5V to eliminate the need
for a resistive divider from the 5V reference.
In the LM3524D the circuit bias line has been isolated from
the shut-down pin. This prevents the oscillator pulse ampli-
tude and frequency from being disturbed by shut-down. Also
at high frequencies (
.
300 kHz) the max. duty cycle per
output has been improved to 44% compared to 35% max.
duty cycle in other 3524s.
In addition, the LM3524D can now be synchronized exter-
nally, through pin 3. Also a latch has been added to insure
one pulse per period even in noisy environments. The
LM3524D includes double pulse suppression logic that in-
sures when a shut-down condition is removed the state of
the T-flip-flop will change only after the first clock pulse has
arrived. This feature prevents the same output from being
pulsed twice in a row, thus reducing the possibility of core
saturation in push-pull designs.
Features
n
Fully interchangeable with standard LM3524 family
n
±
1% precision 5V reference with thermal shut-down
n
Output current to 200 mA DC
n
60V output capability
n
Wide common mode input range for error-amp
n
One pulse per period (noise suppression)
n
Improved max. duty cycle at high frequencies
n
Double pulse suppression
n
Synchronize through pin 3
Connection Diagram
00865002
Top View
Order Number LM2524DN or LM3524DN
See NS Package Number N16E
Order Number LM3524DM
See NS Package Number M16A
March 2005
L
2005 National Semiconductor Corporation
DS008650
www.national.com
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM2524DN/NOPB | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓撲結(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| LM2524DN/NOPB | 制造商:Texas Instruments 功能描述:, Input Voltage Primary Max:40V, Termina |
| LM2524J/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Mode SMPS Controller |
| LM2524N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Mode SMPS Controller |
| LM2524N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Mode SMPS Controller |
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