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參數(shù)資料
| 型號(hào)： | LM1972N |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Pot 2-Channel 78dB Audio Attenuator with Mute |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 3/11頁(yè) |
| 文件大?。?/td> | 301K |
| 代理商： | LM1972N |
Electrical Characteristics
(Note 1) (Note 2) (Continued)
Pin Description
Signal Ground (3, 19):
Each input has its own independent
ground, GND1 and GND2.
Signal Input (4, 20):
There are 2 independent signal inputs,
IN1 and IN2.
Signal Output (2, 17):
There are 2 independent signal out-
puts, OUT1 and OUT2.
Voltage Supply (13, 15):
Positive voltage supply pins, V
DD1
and V
DD2
.
Voltage Supply (7, 18):
Negative voltage supply pins, V
and V
SS2
. To be tied to ground in a single supply configura-
tion.
AC Ground (1, 5, 6, 14, 16):
These five pins are not physi-
cally connected to the die in any way (i.e., No bondwires).
These pins must be AC grounded to prevent signal coupling
between any of the pins nearby. Pin 14 should be connected
to pins 13 and 15 for ease of wiring and the best isolation, as
an example.
Logic Ground (8):
Digital signal ground for the interface
lines; CLOCK, LOAD/SHIFT, DATA-IN and DATA-OUT.
Clock (9):
The clock input accepts a TTL or CMOS level sig-
nal. The clock input is used to load data into the internal shift
register on the rising edge of the input clock waveform.
Load/Shift (10):
The load/shift input accepts a TTL or
CMOS level signal. This is the enable pin of the device, al-
lowing data to be clocked in while this input is low (0V).
Data-In (11):
The data-in input accepts a TTL or CMOS level
signal. This pin is used to accept serial data from a micro-
controller that will be latched and decoded to change a chan-
nel’s attenuation level.
Data-Out (12):
This pin is used in daisy-chain mode where
more than one μPot is controlled via the same data line. As
the data is clocked into the chain from the μC, the preceding
data in the shift register is shifted out the DATA-OUT pin to
the next μPot in the chain or to ground if it is the last μPot in
the chain. The LOAD/SHIFT line goes high once all of the
new data has been shifted into each of its respective regis-
ters.
Connection Diagram
DS011978-3
FIGURE 2. Timing Diagram
DS011978-4
www.national.com
3
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM1972N | 制造商:Texas Instruments 功能描述:AUDIO ATTENUATOR 78DB 1972 DIP20 |
| LM1972N/NOPB | 制造商:Texas Instruments 功能描述:Digital Attenuator 104dB Attenuation 20-Pin PDIP Rail |
| LM1973 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:レPot⑩3-Channel 76dB Audio Attenuator with Mute |
| LM1973M | 功能描述:衰減器 -IC RoHS:否 制造商:Skyworks Solutions, Inc. 最大衰減:18 dB 容差: 阻抗: 功率額定值:30 dBm 安裝風(fēng)格:SMD/SMT 工作溫度范圍:- 40 C to + 85 C |
| LM1973M/NOPB | 功能描述:有源衰減器 RoHS:否 制造商:TriQuint Semiconductor 通道數(shù)量: 最大頻率: 阻抗: 最大 VSWR: 位數(shù): 最大工作溫度: 最小工作溫度: |
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