參數(shù)資料
型號: LM13600N
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 運動控制電子
英文描述: Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers
中文描述: DUAL OP-AMP, 4000 uV OFFSET-MAX, 2 MHz BAND WIDTH, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 15/24頁
文件大?。?/td> 634K
代理商: LM13600N
Voltage Controlled Oscillators
(Continued)
Figure 18 shows how to build a VCO using one amplifier
when the other amplifier is needed for another function.
Additional Applications
Figure 19 presents an interesting one-shot which draws no
power supply current until it is triggered.Apositive-going trig-
ger pulse of at least 2V amplitude turns on the amplifier
through R
and pulls the non-inverting input high. The ampli-
fier regenerates and latches its output high until capacitor C
charges to the voltage level on the non-inverting input. The
output then switches low, turning off the amplifier and dis-
charging the capacitor. The capacitor discharge rate is in-
creased by shorting the diode bias pin to the inverting input
so that an additional discharge current flows through D
I
when the amplifier output switches low. A special feature of
this timer is that the other amplifier, when biased from V
O
,
can perform another function and draw zero stand-by power
as well.
The operation of the multiplexer of Figure 20 is very straight-
forward. When A1 is turned on it holds V
equal to V
IN1
and
when A2 is supplied with bias current then it controls V
. C
C
and R
serve to stabilize the unity-gain configuration of am-
plifiers A1 and A2. The maximum clock rate is limited to
about 200 kHz by the LM13600 slew rate into 150 pF when
the (V
IN1
-V
IN2
) differential is at its maximum allowable value
of 5V.
The Phase-Locked Loop of Figure 21uses the four-quadrant
multiplier of Figure 6 and the VCO of Figure 18 to produce a
PLL with a
±
5% hold-in range and an input sensitivity of
about 300 mV.
DS007980-24
FIGURE 17. Sinusoidal VCO
DS007980-25
FIGURE 18. Single Amplifier VCO
DS007980-26
FIGURE 19. Zero Stand-By Power Timer
www.national.com
15
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