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參數(shù)資料
| 型號： | LM1246 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs |
| 中文描述： | 150 MHz的I2C兼容的RGB前置放大器512個字符OSD光盤，512個字符RAM和4 DAC的內置 |
| 文件頁數(shù)： | 38/51頁 |
| 文件大?。?/td> | 2794K |
| 代理商： | LM1246 |
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Control Register Definitions
(Continued)
Bits 31–0
These are the Display Window 2 Column Width 2x Enable Bits. These thirty-two bits correspond to columns 31–0
of Display Window 2, respectively. A value of zero indicates the column will have normal width (12 OSD pixels). A
value of one indicates the column will be twice as wide as normal (24 OSD pixels). For the double wide case, each
Character Font pixel location will be displayed twice, in two consecutive horizontal pixel locations. The user should
note that if more than 32 display characters are programmed to reside on a line, then all display characters after
the first thirty-two will have normal width (12 pixels).
ROM Bank Select Register A:
BANKSEL_0-1 (0x8427)
Bank Select 1
B1AD[2:0]
Res’d
X
Res’d
X
Bank Select 0
B1AD[2:0]
Bits 2–0
This three-bit field determines the ROM bank (0–7) selected when bits 7–6 of the character
address in Page RAM are 00 (Character Address = 00xxxxxxb)
This bit is reserved and should be set to 0.
This three-bit field determines the ROM bank (0–7) selected when bits 7–6 of the character
address in Page RAM are 01 (Character Address = 01xxxxxxb)
This bit is reserved and should be set to 0.
Bit 3
Bits 6–4
Bit 7
ROM Bank Select Register B:
BANKSEL_2-3 (0x8428)
Bank Select 3
B3AD[2:0]
Res’d
X
Res’d
X
Bank Select 2
B2AD[2:0]
Bits 2–0
This three-bit field determines the ROM bank (0–7) selected when bits 7–6 of the Page RAM
address are 10 (Character Address = 10xxxxxxb)
This bit is reserved and should be set to 0.
This three-bit field determines the ROM bank (0–7) selected when bits 7–6 of the Page RAM
address are 11 (Character Address = 11xxxxxxb)
This bit is reserved and should be set to 0.
Bit 3
Bits 6–4
Bit 7
The actual address for any character in ROM is formed, in logic, from the address in the Page RAM, by this sequence (also see
Figure 13
):
1.
The upper 2 bits of the character address in Page RAM are used to address one of the four 3-bit fields in Bank Select Register
A or Bank Select Register B. As shown in
Table 28. Address Lookup
, depending on which of the four values is present, the
corresponding 3-bit bank address is obtained from the BANKSEL_0, BANKSEL_1, BANKSEL_2, or BANKSEL_3 field shown
in the last column.
TABLE 28. Address Lookup
Character Address in Page
RAM
00xxxxxxb
01xxxxxxb
10xxxxxxb
11xxxxxxb
Upper Two Bits
00b
01b
10b
11b
Three-Bit Bank Address
Source
B0AD[2:0]
B1AD[2:0]
B2AD[2:0]
B3AD[2:0]
L
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| LM1246AAA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs |
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| LM1246NA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs |
| LM1247 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs |
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