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參數(shù)資料
| 型號： | LM12458CIVF/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 25/36頁 |
| 文件大?。?/td> | 1195K |
| 代理商： | LM12458CIVF/NOPB |
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5.0 Sequencer (Continued)
Leaving this bit reset to “0” allows the Sequencer to execute
“unprogrammed” instructions, the results of which may be
unpredictable.
The Sequencer’s Instruction Pointer value is readable at any
time and is found in the Status register at Bits 8–10. The
Sequencer can go through eight states during instruction
execution:
State 0: The current instruction’s first 16 bits are read from
the Instruction RAM “00”. This state is one clock cycle long.
State 1: Checks the state of the Calibration and Start bits.
This is the “rest” state whenever the Sequencer is stopped
using the reset, a Pause command, or the Start bit is reset
low (“0”). When the Start bit is set to a “1”, this state is one
clock cycle long.
State 2: Perform calibration. If bit 2 or bit 6 of the Con-
figuration register is set to a “1”, state 2 is 76 clock cycles
long. If the Configuration register’s bit 3 is set to a “1”, state
2 is 4944 clock cycles long.
State 3: Run the internal 16-bit Timer. The number of
clock cycles for this state varies according to the value
stored in the Timer register. The number of clock cycles is
found by using the expression below
32T + 2
where 0
≤ T ≤ 216 1.
State 7: Run the acquisition delay and read Limit #1’s
value if needed. The number of clock cycles for 12-bit + sign
mode varies according to
9+2D
where D is the user-programmable 4-bit value stored in bits
12–15 of Instruction RAM “00” and is limited to 0
≤ D ≤ 15.
The number of clock cycles for 8-bit + sign or “watchdog”
mode varies according to
2+2D
where D is the user-programmable 4-bit value stored in bits
12–15 of Instruction RAM “00” and is limited to 0
≤ D ≤ 15.
State 6: Perform first comparison. This state is 5 clock
cycles long.
State 4: Read Limit #2. This state is 1 clock cycle long.
State 5: Perform a conversion or second comparison. This
state takes 44 clock cycles when using the 12-bit + sign
mode or 21 clock cycles when using the 8-bit + sign mode.
The “watchdog” mode takes 5 clock cycles.
LM12454/LM12458/LM12H458
www.national.com
31
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM12458CIVX | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| LM12458CIVX/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| LM12458CMEL/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| LM12458MEL/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| LM12458MW/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
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